Abbreviations, About this Manual | Motorola CPCI-6115 guide

About this Manual

Appendix A, Related Documentation, provides a list of related documents including those produced by Motorola, as well as third parties. It also provides a list of industry related specifications.

Abbreviations

This document uses the following abbreviations:

	Abbreviation		Description

	AC		Alternating Current

	AMC		Alarm Management Controller

	AMP		Amphere

	ASIC		Application-Specific Integrated Circuit

	ATA		Advanced Technology Attachment

	BFL		Board Fail

	CBGA		Ceramic Ball Grid Array

	CHRP		Computer Hardware Reference Platform

	CMC		Common Mezzanine Card

	CPCI		CompactPCI

	CPU		Central Processing Unit

	CSR		Control and Status Register

	DC		Direct Current

	DDR		Double Data Rate

	DMA		Direct Memory Access

	DRAM		Dynamic Random Access Memory

	DTE		Data Terminal Equipment

	DTR		Data Terminal Ready

	EIA		Electronic Industries Alliance

	EIDE		Enhanced Integrated Drive Electronics

	EMC		Electromagnetic Compatibility

	ESD		Electrostatic Discharge

	ETSI		European Telecommunications Standards Institute

	FAT		File Allocation Table

	FCC		Federal Communications Commission

	GPP		General Purpose Port

	HS		Hot Swap

	I/O		In/Out

	IDE		Integrated Drive Electronics

	IDMA		Internal Direct Memory Access


12		CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)

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Motorola CPCI-6115 manual Abbreviations, About this Manual, Abbreviation Description

Contents

CPCI-6115 CompactPCI Single Board Computer Trademarks Contents Controls, LEDs, and Connectors Contents Transition Module Preparation and Installation Remote Start via the PCI Bus Related Documentation Contents List of Tables List of Tables 10 Jumper Setting for J99 List of Figures List of Figures Overview of Contents About this Manual Abbreviation Description AbbreviationsAbout this Manual About this Manual Abbreviation Description Bold ConventionsNotation Description Summary of Changes Date Description Replaces Comments and Suggestions Eccrc@motorola.com Safety Notes EMC Safety Notes Configuration Switches/JumpersInstallation Operation Cabling and Connectors Battery Environment Sicherheitshinweise EMV Schaltereinstellungen/Jumper Sicherheitshinweise Installation Batterie Kabel und SteckerUmweltschutz Feature Description FeaturesCPCI-6115 Features Introduction IntroductionStandard Compliances Standard CompliancesBoard Standard Compliances Standard Description Related Product Order Numbers Ordering InformationBoard Variant Order Numbers Introduction Unpacking and Inspecting the Board Hardware Preparation and InstallationOverview Hardware Preparation and Installation Environmental, Power, and Thermal RequirementsCPCI-6115 Specifications Characteristics Specifications CPCI-6115 Specifications Characteristic Value Power RequirementsPower Requirements Thermal Requirements Thermal Requirements Maximum Measurement Allowable Location TemperatureThermally Significant Components Component Location General Description Degrees C Air CPCI-6115 Thermally Significant Components Primary Side Startup Overview Overview of Start-up ProcedureGetting Started Baseboard Preparation Configuring the HardwareHardware Preparation and InstallationEquipment Required Equipment Required CPCI-6115 Jumper Map Setting Switches and JumpersSetting Switches and Jumpers Reference Function Comment 3 J6, Bus Mode Selection Switch and Jumper Locations 5 J10, Flash Bank Selection 4 J9, Standalone Operating ModeJ9, Standalone Operating Mode 6 J15, +/-12 V Present Header 7 J20, Safe Start Header J25, Srom Initialization Enable Header 8 J25, Srom Initialization Enable Header9 J99, Flash Bank a Programming Enable Header Operating Modes Installing HardwareSwitch Setting Address 10 SW2, Geographic Address Installing PMC Modules on the CPCI-6115 Installing PMC Modules on the CPCI-6115 Personal Injury or Death Installing PMC Modules on the CPCI-6115 Installing the CPCI-6115 Baseboard Connecting to a Console Port Connecting to a Console PortApplying Power 11 MOTLoad System Startup Controls, LEDs, and Connectors Indicator Color Status Front Panel Connectors and LEDsControls, LEDs, and Connectors Board Layout SPD/LNK ALT Pin # Signal ABORT/Reset SwitchOn-Board Connectors and Headers 1 J19, Front Panel Asynchronous Serial Port Pin # Signal Direction CompactPCI J1/J2 Connectors10/100/1000 Megabit/s Ethernet Connector, J95 Pin # Megabit/S 10/100 Megabit/S CompactPCI Connector, J2 CompactPCI Bus ConnectorCompactPCI Connector, J1 Pin Row a Row B Row C Row D Row E CompactPCI User I/O ConnectorControls, LEDs, and Connectors CompactPCI User I/O ConnectorUser I/O Connector Pinout, J3 Signal Descriptions CompactPCI ConnectorControls, LEDs, and ConnectorsCompactPCI Connector PMC I/O Signal Descriptions IDE Port, TTL Levels User I/O Connector Pinout, J5CompactPCI User I/O Connector Miscellaneous Signal DescriptionPMC User I/O PCI Mezzanine Card PMC Connectors PCI Mezzanine Card PMC ConnectorsPMC Connector Pin Assignments, J11/J21 Pin J11/J21 PMC ConnectorPin Assignments, J12/J22 Pin J12 J22 10 PMC Connector Pin Assignments, J13/J23 Pin J13/J23 Pin J14/J24 10 PMC Connector Pin Assignments J13/J2311 PMC Connector Pin Assignments , J14/J24 12 Boundary Scan Jtag Header Pin Assignments, J16 Boundary Scan Jtag HeaderProcessor JTAG/COP Header 13 Processor JTAG/COP Header Pin Assignments, J17 Pin Signal Function Flash Boot Bank Select Header15 Flash Boot Bank Select Header Pin Assignments, J10 Stand-Alone Operation Select Header Safe Start Header Bus Mode Select HeaderSrom Initialization Enable Header 19 Bank a Write Protect Header Pin Assignments, J99 Flash Bank a Write Protect Header18 +/-12 V Present Header 20 +/-12 V Present Header Pin Assignments, J15 Functional Description Block Diagram Functional Description General Description Processor Bus Resources 4 MV64360 System Controller Processor3 L3 Cache MV64360 System Controller 4.1 MV64360 CPU Bus Interface4.2 MV64360 DDR Sdram Interface 4.5 MV64360 Integrated Gigabit Ethernet MACs 4.3 MV64360 32-bit Interface to Devices4.4 MV64360 Dual PCI/PCI-X Interfaces Device Bus Parameters 4.6 MV64360 Integrated 2 Megabit Sram 4.7 MV64360 General-Purpose 32-bit Timer/Counters4.8 MV64360 Watchdog Timer 4.9 MV64360 I2O Message Unit Interrupt Controller PCI Bus Arbitration MV64360 MPP Pin Function Assignments Board Reset Logic4.15 MV64360 MPP Configuration MPP Pin Number Input/Output Function MPP Pin 4.16 MV64360 Reset ConfigurationFunctional DescriptionMV64360 System Controller Input/Output Function Bus Signal MV64360 Power-Up Configuration SettingsDefault Device AD Description State of Bit vs. Function MII/GMII PCI1 DLLPCI0 DLL PCS System MemoryFunctional Description System MemorySystem Memory Options Device Organization Memory Device Size Bank Size Bank a Flash Options NVRAM, Real-Time Clock, Watchdog TimerFlash Memory Flash Bank Size Intel Part Number Device Size Serial Eeprom Devices 8 TL16C550C Uart DevicesSystem Registers PCI Bus CompactPCI Bus IDE ControllerIntel 21555 PCI-to-PCI Bridge PMC Slots PMC Slots PrPMC Signal SupportProcessor PMC Support Interrupt Handling MiscellaneousClock Generation Functional DescriptionMiscellaneous Interrupt Handling 2.1 MV64360 Interrupt ControllerMV64360 Interrupt Assignments Edge/L Machine Check Sources of ResetSoft Reset 2.5 SMI Hot Swap Support Onboard Power SuppliesOnboard Power Supplies Hot Swap Process Intel 21555 Hot Swap Support Transition Module Preparation and Installation Block Diagram Transition Module Preparation and Installation Preparing the Transition Module Preparing the Transition Module On-Board Connectors and Headers Rear Panel ConnectorsCPCI-6115-MCPTM Rear Panel Connectors Type Number Description CompactFlash IDE Connector Pin Assignments, J1 IDE CompactFlash ConnectorPMC I/O Module Connectors IDE CompactFlash Connector Pin J10 Host IO ConnectorsPMC I/O Module 1 Host I/O Connector Pin Assignments, J10 IN1DCD PMC I/O Module 2 Host I/O Connector Pin Assignments, J20 Pin J20 PMC I/O Connectors LPaDA+ TX1+ LPaDA-TX1 Ethernet Dioral Mxsyncl DiordyaSerial COM Ports 10BaseT/100BaseTx Connector Pin Assignments 5 10/100/1000BaseTx Connectors6 COM1 And COM2 Connectors MXP Version 10 COM1, COM2 Connector Pin Assignments 7 RJ-45 to DB-9 Adapter for COM1 to PC COM1 11 Wire Interconnection List RJ-45 to DB-9RF-45 Signal RJ-45 Pin DB-9 Pin DB-9 Signal RJ-45 to DB-9 Adapter for COM1 to PC COM1 2 COM1 and COM2 Asynchronous Serial Ports Jumpers Jumper SettingsCompactFlash Jumper 102 Functional Description IDE Flash Serial Eeprom Ethernet Interface CompactPCI VersionHot-Swap Support PMC I/O Modules Asynchronous Serial Ports 6.1 I/O Signal Multiplexing Iomx12 Multiplexing Sequence of the Iomx Function RTS3 CTS3 DTR3 DSR3 RTS1 DCD3 RTS2 CTS1 Serial Port Signal Descriptions 106 Serial Port Redirection Asynchronous Serial Port DiagramsSynchronous Port Board Connector Jumper Header 108 Port Configuration DiagramsPMC I/O Module PMC I/O Module Form Factor PMC I/O Module Form Factor PMC I/O Module Presence Detection and Identification PMC I/O ConnectorHost I/O Connector 110 Installing the PIM Installing the PIM Installing the PIM 112 Installing the Transition Module Installing the Transition Module Removing the Transition Module in a Hot-Swap Chassis 114 Remote Start via the PCI Bus Register Description Bit Number Description Command/Response Register DescriptionRemote Start via the PCI Bus 116 MOTLoad Implementation and Memory Requirements MOTLoad FirmwareMOTLoad Description MOTLoad Tests MOTLoad CommandsMOTLoad Utility Applications MOTLoad Firmware Using MOTLoad Using MOTLoadCommand Line Interface MOTLoad FirmwareCommand Line Help Command Line HelpCommand Line Rules 120 MOTLoad Command List MOTLoad Command ListMOTLoad Commands Command Description MOTLoad FirmwareMOTLoad Command List 122 MOTLoad Command ListMOTLoad Firmware 124 Memory Maps Default Processor Memory MapDefault Processor Memory Map Memory Maps 126 Processor Memory MapMemory MapsProcessor Memory Map Default PCI Memory Map Default PCI Memory MapDefault PCI Address Map Suggested PPC Memory Map Memory MapsSuggested PCI Memory Map Suggested PCI Memory MapSuggested PCI Memory Map 128 CompactPCI Memory Map System I/O Memory MapPCI Local Bus Memory Map Device Bank 1 I/O Memory Map Apollo L3CR Register Assignments Address Decoding with9 L1, L2 and L3 Cache Manufacturers’ Documents Related DocumentationEmbedded Communications Computing Documents Table A-1 Motorola ECC Documents Related Specifications Table A-3 Related Specifications Related SpecificationsRelated Documentation MPR-PPC-RPU-02 Related Documentation 134 Index COM1 136