CompactPCI J1/J2 Connectors | Motorola CPCI-6115 manual

J95, Front Panel 10/100/1000 Megabits/s Ethernet ConnectorControls, LEDs, and Connectors

Table 3-2 COM1 Pin Assignments, J19 (continued)

Pin #	Signal	Direction

2	RTS	OUTPUT

3	GNDC	N/A

4	TXD	OUTPUT

5	RXD	INPUT

6	GNDC	N/A

7	CTS	INPUT

8	DTR	OUTPUT

3.5.2J95, Front Panel 10/100/1000 Megabits/s Ethernet Connector

The CPCI-6115 has one front panel 10/100/1000 megabit/s Gigabit Ethernet connector. It is an industry standard RJ-45 connector with the following pin assignments:

Table 3-3 10/100/1000 Megabit/s Ethernet Connector, J95

Pin #	1000 Megabit/S	10/100 Megabit/S

1	MDIO0+	TD+

2	MDIO0-	TD-

3	MDIO1+	RD+

4	MDIO2+	Not Used

5	MDIO2-	Not Used

6	MDIO1-	RD-

7	MDIO3+	Not Used

MDIO3-	8	Not Used

3.5.3CompactPCI J1/J2 Connectors

The CPCI-6115 CPU board implements a 64-bit CompactPCI interface on connectors J1 and J2. J1 is a 110 pin AMP Z-pack 2mm hard metric type A connector with either +3.3 V or +5 V signaling. J2 is a 110 pin AMP Z-pack 2mm hard metric type B connector. Each of these connectors conform to the CompactPCI specification. The pinout for connectors J1 and J2 are implemented as defined in the CompactPCI specification for a 64-bit peripheral slot board. Note that no reserved or bussed reserved pins are used by CPCI-6115.

CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)

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Motorola CPCI-6115 CompactPCI J1/J2 Connectors, 10/100/1000 Megabit/s Ethernet Connector, J95, Pin # Signal Direction

Contents

CPCI-6115 CompactPCI Single Board Computer Trademarks Contents Contents Controls, LEDs, and Connectors Transition Module Preparation and Installation Remote Start via the PCI Bus Related Documentation Contents List of Tables List of Tables List of Figures 10 Jumper Setting for J99 List of Figures About this Manual Overview of Contents About this Manual AbbreviationsAbbreviation Description About this Manual Abbreviation Description Notation Description ConventionsBold Date Description Replaces Summary of Changes Eccrc@motorola.com Comments and Suggestions EMC Safety Notes Operation Configuration Switches/JumpersInstallation Safety Notes Cabling and Connectors Environment Battery EMV Sicherheitshinweise Sicherheitshinweise Schaltereinstellungen/Jumper Installation Umweltschutz Kabel und SteckerBatterie Introduction FeaturesCPCI-6115 Features Feature Description Standard Description Standard CompliancesBoard Standard Compliances IntroductionStandard Compliances Board Variant Order Numbers Ordering InformationRelated Product Order Numbers Introduction Overview Hardware Preparation and InstallationUnpacking and Inspecting the Board Characteristics Specifications Environmental, Power, and Thermal RequirementsCPCI-6115 Specifications Hardware Preparation and Installation CPCI-6115 Specifications Thermal Requirements Power RequirementsPower Requirements Characteristic Value Component Location General Description Degrees C Air Maximum Measurement Allowable Location TemperatureThermally Significant Components Thermal Requirements CPCI-6115 Thermally Significant Components Primary Side Getting Started Overview of Start-up ProcedureStartup Overview Equipment Required Configuring the HardwareHardware Preparation and InstallationEquipment Required Baseboard Preparation Reference Function Comment Setting Switches and JumpersSetting Switches and Jumpers CPCI-6115 Jumper Map Switch and Jumper Locations 3 J6, Bus Mode Selection J9, Standalone Operating Mode 4 J9, Standalone Operating Mode5 J10, Flash Bank Selection 7 J20, Safe Start Header 6 J15, +/-12 V Present Header 9 J99, Flash Bank a Programming Enable Header 8 J25, Srom Initialization Enable HeaderJ25, Srom Initialization Enable Header 10 SW2, Geographic Address Installing HardwareSwitch Setting Address Operating Modes Installing PMC Modules on the CPCI-6115 Installing PMC Modules on the CPCI-6115 Personal Injury or Death Installing PMC Modules on the CPCI-6115 Installing the CPCI-6115 Baseboard Applying Power Connecting to a Console PortConnecting to a Console Port 11 MOTLoad System Startup Controls, LEDs, and Connectors Board Layout Front Panel Connectors and LEDsControls, LEDs, and Connectors Indicator Color Status ALT SPD/LNK 1 J19, Front Panel Asynchronous Serial Port ABORT/Reset SwitchOn-Board Connectors and Headers Pin # Signal Pin # Megabit/S 10/100 Megabit/S CompactPCI J1/J2 Connectors10/100/1000 Megabit/s Ethernet Connector, J95 Pin # Signal Direction Pin Row a Row B Row C Row D Row E CompactPCI Bus ConnectorCompactPCI Connector, J1 CompactPCI Connector, J2 User I/O Connector Pinout, J3 CompactPCI User I/O ConnectorCompactPCI User I/O ConnectorControls, LEDs, and Connectors PMC I/O CompactPCI ConnectorControls, LEDs, and ConnectorsCompactPCI Connector Signal Descriptions CompactPCI User I/O Connector User I/O Connector Pinout, J5Signal Descriptions IDE Port, TTL Levels PMC User I/O Signal DescriptionMiscellaneous Pin J11/J21 PCI Mezzanine Card PMC ConnectorsPMC Connector Pin Assignments, J11/J21 PCI Mezzanine Card PMC Connectors Pin J12 J22 PMC ConnectorPin Assignments, J12/J22 Pin J13/J23 10 PMC Connector Pin Assignments, J13/J23 11 PMC Connector Pin Assignments , J14/J24 10 PMC Connector Pin Assignments J13/J23Pin J14/J24 13 Processor JTAG/COP Header Pin Assignments, J17 Boundary Scan Jtag HeaderProcessor JTAG/COP Header 12 Boundary Scan Jtag Header Pin Assignments, J16 Stand-Alone Operation Select Header Flash Boot Bank Select Header15 Flash Boot Bank Select Header Pin Assignments, J10 Pin Signal Function Srom Initialization Enable Header Bus Mode Select HeaderSafe Start Header 20 +/-12 V Present Header Pin Assignments, J15 Flash Bank a Write Protect Header18 +/-12 V Present Header 19 Bank a Write Protect Header Pin Assignments, J99 Functional Description Functional Description Block Diagram Processor Bus Resources General Description 3 L3 Cache Processor4 MV64360 System Controller 4.2 MV64360 DDR Sdram Interface 4.1 MV64360 CPU Bus InterfaceMV64360 System Controller Device Bus Parameters 4.3 MV64360 32-bit Interface to Devices4.4 MV64360 Dual PCI/PCI-X Interfaces 4.5 MV64360 Integrated Gigabit Ethernet MACs 4.9 MV64360 I2O Message Unit 4.7 MV64360 General-Purpose 32-bit Timer/Counters4.8 MV64360 Watchdog Timer 4.6 MV64360 Integrated 2 Megabit Sram PCI Bus Arbitration Interrupt Controller MPP Pin Number Input/Output Function Board Reset Logic4.15 MV64360 MPP Configuration MV64360 MPP Pin Function Assignments Input/Output Function 4.16 MV64360 Reset ConfigurationFunctional DescriptionMV64360 System Controller MPP Pin Description State of Bit vs. Function MV64360 Power-Up Configuration SettingsDefault Device AD Bus Signal PCS PCI1 DLLPCI0 DLL MII/GMII Device Organization Memory Device Size Bank Size System MemorySystem Memory Options System MemoryFunctional Description Flash Bank Size Intel Part Number Device Size NVRAM, Real-Time Clock, Watchdog TimerFlash Memory Bank a Flash Options PCI Bus 8 TL16C550C Uart DevicesSystem Registers Serial Eeprom Devices PMC Slots IDE ControllerIntel 21555 PCI-to-PCI Bridge CompactPCI Bus Processor PMC Support PrPMC Signal SupportPMC Slots Functional DescriptionMiscellaneous MiscellaneousClock Generation Interrupt Handling Edge/L 2.1 MV64360 Interrupt ControllerMV64360 Interrupt Assignments Interrupt Handling 2.5 SMI Sources of ResetSoft Reset Machine Check Hot Swap Process Onboard Power SuppliesOnboard Power Supplies Hot Swap Support Intel 21555 Hot Swap Support Transition Module Preparation and Installation Transition Module Preparation and Installation Block Diagram Preparing the Transition Module Preparing the Transition Module Type Number Description Rear Panel ConnectorsCPCI-6115-MCPTM Rear Panel Connectors On-Board Connectors and Headers IDE CompactFlash Connector IDE CompactFlash ConnectorPMC I/O Module Connectors CompactFlash IDE Connector Pin Assignments, J1 IN1DCD Host IO ConnectorsPMC I/O Module 1 Host I/O Connector Pin Assignments, J10 Pin J10 Pin J20 PMC I/O Module 2 Host I/O Connector Pin Assignments, J20 PMC I/O Connectors LPaDA+ TX1+ LPaDA-TX1 Dioral Ethernet Serial COM Ports DiordyaMxsyncl 10 COM1, COM2 Connector Pin Assignments 5 10/100/1000BaseTx Connectors6 COM1 And COM2 Connectors MXP Version 10BaseT/100BaseTx Connector Pin Assignments RJ-45 to DB-9 Adapter for COM1 to PC COM1 11 Wire Interconnection List RJ-45 to DB-9RF-45 Signal RJ-45 Pin DB-9 Pin DB-9 Signal 7 RJ-45 to DB-9 Adapter for COM1 to PC COM1 102 Jumper SettingsCompactFlash Jumper 2 COM1 and COM2 Asynchronous Serial Ports Jumpers IDE Flash Functional Description PMC I/O Modules Ethernet Interface CompactPCI VersionHot-Swap Support Serial Eeprom RTS3 CTS3 DTR3 DSR3 RTS1 DCD3 RTS2 CTS1 6.1 I/O Signal Multiplexing Iomx12 Multiplexing Sequence of the Iomx Function Asynchronous Serial Ports 106 Serial Port Signal Descriptions Synchronous Port Board Connector Jumper Header Asynchronous Serial Port DiagramsSerial Port Redirection PMC I/O Module Port Configuration Diagrams108 PMC I/O Module Form Factor PMC I/O Module Form Factor 110 PMC I/O ConnectorHost I/O Connector PMC I/O Module Presence Detection and Identification Installing the PIM Installing the PIM 112 Installing the PIM Installing the Transition Module Installing the Transition Module 114 Removing the Transition Module in a Hot-Swap Chassis Register Description Remote Start via the PCI Bus 116 Command/Response Register DescriptionRemote Start via the PCI Bus Bit Number Description MOTLoad Description MOTLoad FirmwareMOTLoad Implementation and Memory Requirements MOTLoad Firmware MOTLoad CommandsMOTLoad Utility Applications MOTLoad Tests Command Line Interface Using MOTLoadUsing MOTLoad 120 Command Line HelpCommand Line Rules MOTLoad FirmwareCommand Line Help Command Description MOTLoad Command ListMOTLoad Commands MOTLoad Command List 122 MOTLoad FirmwareMOTLoad Command List MOTLoad Command ListMOTLoad Firmware 124 Memory Maps Default Processor Memory MapDefault Processor Memory Map Memory Maps Memory MapsProcessor Memory Map Processor Memory Map126 Suggested PPC Memory Map Default PCI Memory MapDefault PCI Address Map Default PCI Memory Map 128 Suggested PCI Memory MapSuggested PCI Memory Map Memory MapsSuggested PCI Memory Map Device Bank 1 I/O Memory Map System I/O Memory MapPCI Local Bus Memory Map CompactPCI Memory Map 9 L1, L2 and L3 Cache Address Decoding withApollo L3CR Register Assignments Table A-1 Motorola ECC Documents Related DocumentationEmbedded Communications Computing Documents Manufacturers’ Documents Table A-3 Related Specifications Related Specifications MPR-PPC-RPU-02 Related SpecificationsRelated Documentation 134 Related Documentation COM1 Index 136