4 J9, Standalone Operating Mode | Motorola CPCI-6115 instruction

J9, Standalone Operating Mode	Hardware Preparation and Installation

2.5.4J9, Standalone Operating Mode

The CPCI-6115 has a standalone operating mode that allows the CPCI-6115 to function without a system slot controller board. Installing a jumper across pins 1 and 2 of J9 enables the standalone mode. The J9 jumper must be removed for normal operation.

Figure 2-5 Jumper Settings for J9

An CPCI-6115 configured for standalone mode should not be installed in a chassis with a system slot controller board. This will result in unpredictable system operation.

2.5.5J10, Flash Bank Selection

The flash memory is organized in two banks (A and B). Both banks are 32 bits wide and form a 32-bit flash bank. Bank B offers a minimum of 8MB of soldered flash memory. Bank A offers 32MB of soldered flash memory.

To enable Flash Bank A, place a jumper across header pins 1 and 2. This will route the BOOTCS* signal to Flash Bank A and device CS0* to Flash Bank B. To enable Flash Bank B place a jumper across header pins 2 and 3. This routes the BOOTCS* signal to Flash Bank B and the CS0* signal to Flash Bank A.

Figure 2-6 Jumper Settings for J10

CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)

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Motorola CPCI-6115 manual 4 J9, Standalone Operating Mode, 5 J10, Flash Bank Selection

Contents

CPCI-6115 CompactPCI Single Board Computer Trademarks Contents Contents Controls, LEDs, and Connectors Transition Module Preparation and Installation Remote Start via the PCI Bus Related Documentation Contents List of Tables List of Tables List of Figures 10 Jumper Setting for J99 List of Figures About this Manual Overview of Contents Abbreviation Description AbbreviationsAbout this Manual About this Manual Abbreviation Description Bold ConventionsNotation Description Date Description Replaces Summary of Changes Eccrc@motorola.com Comments and Suggestions EMC Safety Notes Installation Configuration Switches/JumpersSafety Notes Operation Cabling and Connectors Environment Battery EMV Sicherheitshinweise Sicherheitshinweise Schaltereinstellungen/Jumper Installation Batterie Kabel und SteckerUmweltschutz CPCI-6115 Features FeaturesFeature Description Introduction Board Standard Compliances Standard CompliancesIntroductionStandard Compliances Standard Description Related Product Order Numbers Ordering InformationBoard Variant Order Numbers Introduction Unpacking and Inspecting the Board Hardware Preparation and InstallationOverview CPCI-6115 Specifications Environmental, Power, and Thermal RequirementsHardware Preparation and Installation Characteristics Specifications CPCI-6115 Specifications Power Requirements Power RequirementsCharacteristic Value Thermal Requirements Thermally Significant Components Maximum Measurement Allowable Location TemperatureThermal Requirements Component Location General Description Degrees C Air CPCI-6115 Thermally Significant Components Primary Side Startup Overview Overview of Start-up ProcedureGetting Started Hardware Preparation and InstallationEquipment Required Configuring the HardwareBaseboard Preparation Equipment Required Setting Switches and Jumpers Setting Switches and JumpersCPCI-6115 Jumper Map Reference Function Comment Switch and Jumper Locations 3 J6, Bus Mode Selection 5 J10, Flash Bank Selection 4 J9, Standalone Operating ModeJ9, Standalone Operating Mode 7 J20, Safe Start Header 6 J15, +/-12 V Present Header J25, Srom Initialization Enable Header 8 J25, Srom Initialization Enable Header9 J99, Flash Bank a Programming Enable Header Switch Setting Address Installing HardwareOperating Modes 10 SW2, Geographic Address Installing PMC Modules on the CPCI-6115 Installing PMC Modules on the CPCI-6115 Personal Injury or Death Installing PMC Modules on the CPCI-6115 Installing the CPCI-6115 Baseboard Connecting to a Console Port Connecting to a Console PortApplying Power 11 MOTLoad System Startup Controls, LEDs, and Connectors Controls, LEDs, and Connectors Front Panel Connectors and LEDsIndicator Color Status Board Layout ALT SPD/LNK On-Board Connectors and Headers ABORT/Reset SwitchPin # Signal 1 J19, Front Panel Asynchronous Serial Port 10/100/1000 Megabit/s Ethernet Connector, J95 CompactPCI J1/J2 ConnectorsPin # Signal Direction Pin # Megabit/S 10/100 Megabit/S CompactPCI Connector, J1 CompactPCI Bus ConnectorCompactPCI Connector, J2 Pin Row a Row B Row C Row D Row E CompactPCI User I/O ConnectorControls, LEDs, and Connectors CompactPCI User I/O ConnectorUser I/O Connector Pinout, J3 Controls, LEDs, and ConnectorsCompactPCI Connector CompactPCI ConnectorSignal Descriptions PMC I/O Signal Descriptions IDE Port, TTL Levels User I/O Connector Pinout, J5CompactPCI User I/O Connector Miscellaneous Signal DescriptionPMC User I/O PMC Connector Pin Assignments, J11/J21 PCI Mezzanine Card PMC ConnectorsPCI Mezzanine Card PMC Connectors Pin J11/J21 Pin J12 J22 PMC ConnectorPin Assignments, J12/J22 Pin J13/J23 10 PMC Connector Pin Assignments, J13/J23 Pin J14/J24 10 PMC Connector Pin Assignments J13/J2311 PMC Connector Pin Assignments , J14/J24 Processor JTAG/COP Header Boundary Scan Jtag Header12 Boundary Scan Jtag Header Pin Assignments, J16 13 Processor JTAG/COP Header Pin Assignments, J17 15 Flash Boot Bank Select Header Pin Assignments, J10 Flash Boot Bank Select HeaderPin Signal Function Stand-Alone Operation Select Header Safe Start Header Bus Mode Select HeaderSrom Initialization Enable Header 18 +/-12 V Present Header Flash Bank a Write Protect Header19 Bank a Write Protect Header Pin Assignments, J99 20 +/-12 V Present Header Pin Assignments, J15 Functional Description Functional Description Block Diagram Processor Bus Resources General Description 4 MV64360 System Controller Processor3 L3 Cache MV64360 System Controller 4.1 MV64360 CPU Bus Interface4.2 MV64360 DDR Sdram Interface 4.4 MV64360 Dual PCI/PCI-X Interfaces 4.3 MV64360 32-bit Interface to Devices4.5 MV64360 Integrated Gigabit Ethernet MACs Device Bus Parameters 4.8 MV64360 Watchdog Timer 4.7 MV64360 General-Purpose 32-bit Timer/Counters4.6 MV64360 Integrated 2 Megabit Sram 4.9 MV64360 I2O Message Unit PCI Bus Arbitration Interrupt Controller 4.15 MV64360 MPP Configuration Board Reset LogicMV64360 MPP Pin Function Assignments MPP Pin Number Input/Output Function Functional DescriptionMV64360 System Controller 4.16 MV64360 Reset ConfigurationMPP Pin Input/Output Function Default Device AD MV64360 Power-Up Configuration SettingsBus Signal Description State of Bit vs. Function PCI0 DLL PCI1 DLLMII/GMII PCS System Memory Options System MemorySystem MemoryFunctional Description Device Organization Memory Device Size Bank Size Flash Memory NVRAM, Real-Time Clock, Watchdog TimerBank a Flash Options Flash Bank Size Intel Part Number Device Size System Registers 8 TL16C550C Uart DevicesSerial Eeprom Devices PCI Bus Intel 21555 PCI-to-PCI Bridge IDE ControllerCompactPCI Bus PMC Slots PMC Slots PrPMC Signal SupportProcessor PMC Support Clock Generation MiscellaneousInterrupt Handling Functional DescriptionMiscellaneous MV64360 Interrupt Assignments 2.1 MV64360 Interrupt ControllerInterrupt Handling Edge/L Soft Reset Sources of ResetMachine Check 2.5 SMI Onboard Power Supplies Onboard Power SuppliesHot Swap Support Hot Swap Process Intel 21555 Hot Swap Support Transition Module Preparation and Installation Transition Module Preparation and Installation Block Diagram Preparing the Transition Module Preparing the Transition Module CPCI-6115-MCPTM Rear Panel Connectors Rear Panel ConnectorsOn-Board Connectors and Headers Type Number Description PMC I/O Module Connectors IDE CompactFlash ConnectorCompactFlash IDE Connector Pin Assignments, J1 IDE CompactFlash Connector PMC I/O Module 1 Host I/O Connector Pin Assignments, J10 Host IO ConnectorsPin J10 IN1DCD Pin J20 PMC I/O Module 2 Host I/O Connector Pin Assignments, J20 PMC I/O Connectors LPaDA+ TX1+ LPaDA-TX1 Dioral Ethernet Mxsyncl DiordyaSerial COM Ports 6 COM1 And COM2 Connectors MXP Version 5 10/100/1000BaseTx Connectors10BaseT/100BaseTx Connector Pin Assignments 10 COM1, COM2 Connector Pin Assignments RF-45 Signal RJ-45 Pin DB-9 Pin DB-9 Signal 11 Wire Interconnection List RJ-45 to DB-97 RJ-45 to DB-9 Adapter for COM1 to PC COM1 RJ-45 to DB-9 Adapter for COM1 to PC COM1 CompactFlash Jumper Jumper Settings2 COM1 and COM2 Asynchronous Serial Ports Jumpers 102 IDE Flash Functional Description Hot-Swap Support Ethernet Interface CompactPCI VersionSerial Eeprom PMC I/O Modules 12 Multiplexing Sequence of the Iomx Function 6.1 I/O Signal Multiplexing IomxAsynchronous Serial Ports RTS3 CTS3 DTR3 DSR3 RTS1 DCD3 RTS2 CTS1 106 Serial Port Signal Descriptions Serial Port Redirection Asynchronous Serial Port DiagramsSynchronous Port Board Connector Jumper Header 108 Port Configuration DiagramsPMC I/O Module PMC I/O Module Form Factor PMC I/O Module Form Factor Host I/O Connector PMC I/O ConnectorPMC I/O Module Presence Detection and Identification 110 Installing the PIM Installing the PIM 112 Installing the PIM Installing the Transition Module Installing the Transition Module 114 Removing the Transition Module in a Hot-Swap Chassis Register Description Remote Start via the PCI Bus Remote Start via the PCI Bus Command/Response Register DescriptionBit Number Description 116 MOTLoad Implementation and Memory Requirements MOTLoad FirmwareMOTLoad Description MOTLoad Utility Applications MOTLoad CommandsMOTLoad Tests MOTLoad Firmware Using MOTLoad Using MOTLoadCommand Line Interface Command Line Rules Command Line HelpMOTLoad FirmwareCommand Line Help 120 MOTLoad Commands MOTLoad Command ListMOTLoad Command List Command Description 122 MOTLoad FirmwareMOTLoad Command List MOTLoad Command ListMOTLoad Firmware 124 Default Processor Memory Map Default Processor Memory MapMemory Maps Memory Maps 126 Processor Memory MapMemory MapsProcessor Memory Map Default PCI Address Map Default PCI Memory MapDefault PCI Memory Map Suggested PPC Memory Map Suggested PCI Memory Map Suggested PCI Memory MapMemory MapsSuggested PCI Memory Map 128 PCI Local Bus Memory Map System I/O Memory MapCompactPCI Memory Map Device Bank 1 I/O Memory Map Apollo L3CR Register Assignments Address Decoding with9 L1, L2 and L3 Cache Embedded Communications Computing Documents Related DocumentationManufacturers’ Documents Table A-1 Motorola ECC Documents Table A-3 Related Specifications Related Specifications MPR-PPC-RPU-02 Related SpecificationsRelated Documentation 134 Related Documentation COM1 Index 136