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Motorola CPCI-6115 manual 8 J25, Srom Initialization Enable Header

Models: CPCI-6115

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J25, SROM Initialization Enable Header	Hardware Preparation and Installation

2.5.8J25, SROM Initialization Enable Header

A 3-pin header is used to enable or disable the SROM initialization. A jumper placed between pins 1 and 2 enables the device initialization via the I2C SROM. No jumper or a jumper placed between pins 2 and 3 disables the initialization sequence.

Figure 2-9 Jumper Setting for J25

2.5.9J99, Flash Bank A Programming Enable Header

To protect the contents of Flash Bank A a 2-pin header is used to enable or disable the programming of Flash Bank A. A jumper across pins 1 and 2 enables writes to array blocks, programming data, or configuring lock-bits. No jumper installed disables all Flash Bank A programming.

Figure 2-10 Jumper Setting for J99

CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)

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Motorola CPCI-6115 manual 8 J25, Srom Initialization Enable Header, 9 J99, Flash Bank a Programming Enable Header

Contents

CPCI-6115 CompactPCI Single Board Computer Trademarks Contents Contents Controls, LEDs, and ConnectorsTransition Module Preparation and Installation Remote Start via the PCI Bus Related Documentation Contents List of Tables List of Tables List of Figures 10 Jumper Setting for J99List of Figures About this Manual Overview of ContentsAbout this Manual AbbreviationsAbbreviation Description About this Manual Abbreviation Description Notation Description ConventionsBold Date Description Replaces Summary of ChangesEccrc@motorola.com Comments and SuggestionsEMC Safety NotesOperation Configuration Switches/JumpersInstallation Safety NotesCabling and Connectors Environment BatteryEMV SicherheitshinweiseSicherheitshinweise Schaltereinstellungen/JumperInstallation Umweltschutz Kabel und SteckerBatterie Introduction FeaturesCPCI-6115 Features Feature DescriptionStandard Description Standard CompliancesBoard Standard Compliances IntroductionStandard CompliancesBoard Variant Order Numbers Ordering InformationRelated Product Order Numbers Introduction Overview Hardware Preparation and InstallationUnpacking and Inspecting the Board Characteristics Specifications Environmental, Power, and Thermal RequirementsCPCI-6115 Specifications Hardware Preparation and InstallationCPCI-6115 Specifications Thermal Requirements Power RequirementsPower Requirements Characteristic ValueComponent Location General Description Degrees C Air Maximum Measurement Allowable Location TemperatureThermally Significant Components Thermal RequirementsCPCI-6115 Thermally Significant Components Primary Side Getting Started Overview of Start-up ProcedureStartup Overview Equipment Required Configuring the HardwareHardware Preparation and InstallationEquipment Required Baseboard PreparationReference Function Comment Setting Switches and JumpersSetting Switches and Jumpers CPCI-6115 Jumper MapSwitch and Jumper Locations 3 J6, Bus Mode SelectionJ9, Standalone Operating Mode 4 J9, Standalone Operating Mode5 J10, Flash Bank Selection 7 J20, Safe Start Header 6 J15, +/-12 V Present Header9 J99, Flash Bank a Programming Enable Header 8 J25, Srom Initialization Enable HeaderJ25, Srom Initialization Enable Header 10 SW2, Geographic Address Installing HardwareSwitch Setting Address Operating ModesInstalling PMC Modules on the CPCI-6115 Installing PMC Modules on the CPCI-6115Personal Injury or Death Installing PMC Modules on the CPCI-6115 Installing the CPCI-6115 Baseboard Applying Power Connecting to a Console PortConnecting to a Console Port 11 MOTLoad System Startup Controls, LEDs, and Connectors Board Layout Front Panel Connectors and LEDsControls, LEDs, and Connectors Indicator Color StatusALT SPD/LNK1 J19, Front Panel Asynchronous Serial Port ABORT/Reset SwitchOn-Board Connectors and Headers Pin # SignalPin # Megabit/S 10/100 Megabit/S CompactPCI J1/J2 Connectors10/100/1000 Megabit/s Ethernet Connector, J95 Pin # Signal DirectionPin Row a Row B Row C Row D Row E CompactPCI Bus ConnectorCompactPCI Connector, J1 CompactPCI Connector, J2User I/O Connector Pinout, J3 CompactPCI User I/O ConnectorCompactPCI User I/O ConnectorControls, LEDs, and Connectors PMC I/O CompactPCI ConnectorControls, LEDs, and ConnectorsCompactPCI Connector Signal DescriptionsCompactPCI User I/O Connector User I/O Connector Pinout, J5Signal Descriptions IDE Port, TTL Levels PMC User I/O Signal DescriptionMiscellaneous Pin J11/J21 PCI Mezzanine Card PMC ConnectorsPMC Connector Pin Assignments, J11/J21 PCI Mezzanine Card PMC ConnectorsPin J12 J22 PMC ConnectorPin Assignments, J12/J22Pin J13/J23 10 PMC Connector Pin Assignments, J13/J2311 PMC Connector Pin Assignments , J14/J24 10 PMC Connector Pin Assignments J13/J23Pin J14/J24 13 Processor JTAG/COP Header Pin Assignments, J17 Boundary Scan Jtag HeaderProcessor JTAG/COP Header 12 Boundary Scan Jtag Header Pin Assignments, J16Stand-Alone Operation Select Header Flash Boot Bank Select Header15 Flash Boot Bank Select Header Pin Assignments, J10 Pin Signal FunctionSrom Initialization Enable Header Bus Mode Select HeaderSafe Start Header 20 +/-12 V Present Header Pin Assignments, J15 Flash Bank a Write Protect Header18 +/-12 V Present Header 19 Bank a Write Protect Header Pin Assignments, J99Functional Description Functional Description Block DiagramProcessor Bus Resources General Description3 L3 Cache Processor4 MV64360 System Controller 4.2 MV64360 DDR Sdram Interface 4.1 MV64360 CPU Bus InterfaceMV64360 System Controller Device Bus Parameters 4.3 MV64360 32-bit Interface to Devices4.4 MV64360 Dual PCI/PCI-X Interfaces 4.5 MV64360 Integrated Gigabit Ethernet MACs4.9 MV64360 I2O Message Unit 4.7 MV64360 General-Purpose 32-bit Timer/Counters4.8 MV64360 Watchdog Timer 4.6 MV64360 Integrated 2 Megabit SramPCI Bus Arbitration Interrupt ControllerMPP Pin Number Input/Output Function Board Reset Logic4.15 MV64360 MPP Configuration MV64360 MPP Pin Function AssignmentsInput/Output Function 4.16 MV64360 Reset ConfigurationFunctional DescriptionMV64360 System Controller MPP PinDescription State of Bit vs. Function MV64360 Power-Up Configuration SettingsDefault Device AD Bus SignalPCS PCI1 DLLPCI0 DLL MII/GMIIDevice Organization Memory Device Size Bank Size System MemorySystem Memory Options System MemoryFunctional DescriptionFlash Bank Size Intel Part Number Device Size NVRAM, Real-Time Clock, Watchdog TimerFlash Memory Bank a Flash OptionsPCI Bus 8 TL16C550C Uart DevicesSystem Registers Serial Eeprom DevicesPMC Slots IDE ControllerIntel 21555 PCI-to-PCI Bridge CompactPCI BusProcessor PMC Support PrPMC Signal SupportPMC Slots Functional DescriptionMiscellaneous MiscellaneousClock Generation Interrupt HandlingEdge/L 2.1 MV64360 Interrupt ControllerMV64360 Interrupt Assignments Interrupt Handling2.5 SMI Sources of ResetSoft Reset Machine CheckHot Swap Process Onboard Power SuppliesOnboard Power Supplies Hot Swap SupportIntel 21555 Hot Swap Support Transition Module Preparation and Installation Transition Module Preparation and Installation Block DiagramPreparing the Transition Module Preparing the Transition ModuleType Number Description Rear Panel ConnectorsCPCI-6115-MCPTM Rear Panel Connectors On-Board Connectors and HeadersIDE CompactFlash Connector IDE CompactFlash ConnectorPMC I/O Module Connectors CompactFlash IDE Connector Pin Assignments, J1IN1DCD Host IO ConnectorsPMC I/O Module 1 Host I/O Connector Pin Assignments, J10 Pin J10Pin J20 PMC I/O Module 2 Host I/O Connector Pin Assignments, J20PMC I/O Connectors LPaDA+ TX1+ LPaDA-TX1 Dioral EthernetSerial COM Ports DiordyaMxsyncl 10 COM1, COM2 Connector Pin Assignments 5 10/100/1000BaseTx Connectors6 COM1 And COM2 Connectors MXP Version 10BaseT/100BaseTx Connector Pin AssignmentsRJ-45 to DB-9 Adapter for COM1 to PC COM1 11 Wire Interconnection List RJ-45 to DB-9RF-45 Signal RJ-45 Pin DB-9 Pin DB-9 Signal 7 RJ-45 to DB-9 Adapter for COM1 to PC COM1102 Jumper SettingsCompactFlash Jumper 2 COM1 and COM2 Asynchronous Serial Ports JumpersIDE Flash Functional DescriptionPMC I/O Modules Ethernet Interface CompactPCI VersionHot-Swap Support Serial EepromRTS3 CTS3 DTR3 DSR3 RTS1 DCD3 RTS2 CTS1 6.1 I/O Signal Multiplexing Iomx12 Multiplexing Sequence of the Iomx Function Asynchronous Serial Ports106 Serial Port Signal DescriptionsSynchronous Port Board Connector Jumper Header Asynchronous Serial Port DiagramsSerial Port Redirection PMC I/O Module Port Configuration Diagrams108 PMC I/O Module Form Factor PMC I/O Module Form Factor110 PMC I/O ConnectorHost I/O Connector PMC I/O Module Presence Detection and IdentificationInstalling the PIM Installing the PIM112 Installing the PIMInstalling the Transition Module Installing the Transition Module114 Removing the Transition Module in a Hot-Swap ChassisRegister Description Remote Start via the PCI Bus116 Command/Response Register DescriptionRemote Start via the PCI Bus Bit Number DescriptionMOTLoad Description MOTLoad FirmwareMOTLoad Implementation and Memory Requirements MOTLoad Firmware MOTLoad CommandsMOTLoad Utility Applications MOTLoad TestsCommand Line Interface Using MOTLoadUsing MOTLoad 120 Command Line HelpCommand Line Rules MOTLoad FirmwareCommand Line HelpCommand Description MOTLoad Command ListMOTLoad Commands MOTLoad Command List122 MOTLoad FirmwareMOTLoad Command ListMOTLoad Command ListMOTLoad Firmware 124 Memory Maps Default Processor Memory MapDefault Processor Memory Map Memory MapsMemory MapsProcessor Memory Map Processor Memory Map126 Suggested PPC Memory Map Default PCI Memory MapDefault PCI Address Map Default PCI Memory Map128 Suggested PCI Memory MapSuggested PCI Memory Map Memory MapsSuggested PCI Memory MapDevice Bank 1 I/O Memory Map System I/O Memory MapPCI Local Bus Memory Map CompactPCI Memory Map9 L1, L2 and L3 Cache Address Decoding withApollo L3CR Register Assignments Table A-1 Motorola ECC Documents Related DocumentationEmbedded Communications Computing Documents Manufacturers’ DocumentsTable A-3 Related Specifications Related SpecificationsMPR-PPC-RPU-02 Related SpecificationsRelated Documentation134 Related DocumentationCOM1 Index136