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Motorola CPCI-6115 manual Intel 21555 Hot Swap Support

Models: CPCI-6115

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Functional Description	Intel 21555 Hot Swap Support

zThe 21555 contains an Removal Status bit (REM_STAT) in the CompactPCI Hot Swap Control Register to indicate an impending hot swap event.

zThe 21555 contains an Insertion Status bit (INS_STAT) in the CompactPCI Hot Swap Control Register to indicate that the serial preload is complete and the Primary Lockout bit has been cleared, indicating that the card is ready for host initialization.

88	CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)

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Motorola CPCI-6115 manual Intel 21555 Hot Swap Support

Contents

CPCI-6115 CompactPCI Single Board Computer Trademarks Contents Controls, LEDs, and Connectors ContentsTransition Module Preparation and Installation Remote Start via the PCI Bus Related Documentation Contents List of Tables List of Tables 10 Jumper Setting for J99 List of FiguresList of Figures Overview of Contents About this ManualAbbreviations About this ManualAbbreviation Description About this Manual Abbreviation Description Conventions Notation DescriptionBold Summary of Changes Date Description ReplacesComments and Suggestions Eccrc@motorola.comSafety Notes EMCSafety Notes Configuration Switches/JumpersInstallation OperationCabling and Connectors Battery EnvironmentSicherheitshinweise EMVSchaltereinstellungen/Jumper SicherheitshinweiseInstallation Kabel und Stecker UmweltschutzBatterie Feature Description FeaturesCPCI-6115 Features IntroductionIntroductionStandard Compliances Standard CompliancesBoard Standard Compliances Standard DescriptionOrdering Information Board Variant Order NumbersRelated Product Order Numbers Introduction Hardware Preparation and Installation OverviewUnpacking and Inspecting the Board Hardware Preparation and Installation Environmental, Power, and Thermal RequirementsCPCI-6115 Specifications Characteristics SpecificationsCPCI-6115 Specifications Characteristic Value Power RequirementsPower Requirements Thermal RequirementsThermal Requirements Maximum Measurement Allowable Location TemperatureThermally Significant Components Component Location General Description Degrees C AirCPCI-6115 Thermally Significant Components Primary Side Overview of Start-up Procedure Getting StartedStartup Overview Baseboard Preparation Configuring the HardwareHardware Preparation and InstallationEquipment Required Equipment RequiredCPCI-6115 Jumper Map Setting Switches and JumpersSetting Switches and Jumpers Reference Function Comment3 J6, Bus Mode Selection Switch and Jumper Locations4 J9, Standalone Operating Mode J9, Standalone Operating Mode5 J10, Flash Bank Selection 6 J15, +/-12 V Present Header 7 J20, Safe Start Header8 J25, Srom Initialization Enable Header 9 J99, Flash Bank a Programming Enable HeaderJ25, Srom Initialization Enable Header Operating Modes Installing HardwareSwitch Setting Address 10 SW2, Geographic AddressInstalling PMC Modules on the CPCI-6115 Installing PMC Modules on the CPCI-6115Personal Injury or Death Installing PMC Modules on the CPCI-6115 Installing the CPCI-6115 Baseboard Connecting to a Console Port Applying PowerConnecting to a Console Port 11 MOTLoad System Startup Controls, LEDs, and Connectors Indicator Color Status Front Panel Connectors and LEDsControls, LEDs, and Connectors Board LayoutSPD/LNK ALTPin # Signal ABORT/Reset SwitchOn-Board Connectors and Headers 1 J19, Front Panel Asynchronous Serial PortPin # Signal Direction CompactPCI J1/J2 Connectors10/100/1000 Megabit/s Ethernet Connector, J95 Pin # Megabit/S 10/100 Megabit/SCompactPCI Connector, J2 CompactPCI Bus ConnectorCompactPCI Connector, J1 Pin Row a Row B Row C Row D Row ECompactPCI User I/O Connector User I/O Connector Pinout, J3CompactPCI User I/O ConnectorControls, LEDs, and Connectors Signal Descriptions CompactPCI ConnectorControls, LEDs, and ConnectorsCompactPCI Connector PMC I/OUser I/O Connector Pinout, J5 CompactPCI User I/O ConnectorSignal Descriptions IDE Port, TTL Levels Signal Description PMC User I/OMiscellaneous PCI Mezzanine Card PMC Connectors PCI Mezzanine Card PMC ConnectorsPMC Connector Pin Assignments, J11/J21 Pin J11/J21PMC ConnectorPin Assignments, J12/J22 Pin J12 J2210 PMC Connector Pin Assignments, J13/J23 Pin J13/J2310 PMC Connector Pin Assignments J13/J23 11 PMC Connector Pin Assignments , J14/J24Pin J14/J24 12 Boundary Scan Jtag Header Pin Assignments, J16 Boundary Scan Jtag HeaderProcessor JTAG/COP Header 13 Processor JTAG/COP Header Pin Assignments, J17Pin Signal Function Flash Boot Bank Select Header15 Flash Boot Bank Select Header Pin Assignments, J10 Stand-Alone Operation Select HeaderBus Mode Select Header Srom Initialization Enable HeaderSafe Start Header 19 Bank a Write Protect Header Pin Assignments, J99 Flash Bank a Write Protect Header18 +/-12 V Present Header 20 +/-12 V Present Header Pin Assignments, J15Functional Description Block Diagram Functional DescriptionGeneral Description Processor Bus ResourcesProcessor 3 L3 Cache4 MV64360 System Controller 4.1 MV64360 CPU Bus Interface 4.2 MV64360 DDR Sdram InterfaceMV64360 System Controller 4.5 MV64360 Integrated Gigabit Ethernet MACs 4.3 MV64360 32-bit Interface to Devices4.4 MV64360 Dual PCI/PCI-X Interfaces Device Bus Parameters4.6 MV64360 Integrated 2 Megabit Sram 4.7 MV64360 General-Purpose 32-bit Timer/Counters4.8 MV64360 Watchdog Timer 4.9 MV64360 I2O Message UnitInterrupt Controller PCI Bus ArbitrationMV64360 MPP Pin Function Assignments Board Reset Logic4.15 MV64360 MPP Configuration MPP Pin Number Input/Output FunctionMPP Pin 4.16 MV64360 Reset ConfigurationFunctional DescriptionMV64360 System Controller Input/Output FunctionBus Signal MV64360 Power-Up Configuration SettingsDefault Device AD Description State of Bit vs. FunctionMII/GMII PCI1 DLLPCI0 DLL PCSSystem MemoryFunctional Description System MemorySystem Memory Options Device Organization Memory Device Size Bank SizeBank a Flash Options NVRAM, Real-Time Clock, Watchdog TimerFlash Memory Flash Bank Size Intel Part Number Device SizeSerial Eeprom Devices 8 TL16C550C Uart DevicesSystem Registers PCI BusCompactPCI Bus IDE ControllerIntel 21555 PCI-to-PCI Bridge PMC SlotsPrPMC Signal Support Processor PMC SupportPMC Slots Interrupt Handling MiscellaneousClock Generation Functional DescriptionMiscellaneousInterrupt Handling 2.1 MV64360 Interrupt ControllerMV64360 Interrupt Assignments Edge/LMachine Check Sources of ResetSoft Reset 2.5 SMIHot Swap Support Onboard Power SuppliesOnboard Power Supplies Hot Swap ProcessIntel 21555 Hot Swap Support Transition Module Preparation and Installation Block Diagram Transition Module Preparation and InstallationPreparing the Transition Module Preparing the Transition ModuleOn-Board Connectors and Headers Rear Panel ConnectorsCPCI-6115-MCPTM Rear Panel Connectors Type Number DescriptionCompactFlash IDE Connector Pin Assignments, J1 IDE CompactFlash ConnectorPMC I/O Module Connectors IDE CompactFlash ConnectorPin J10 Host IO ConnectorsPMC I/O Module 1 Host I/O Connector Pin Assignments, J10 IN1DCDPMC I/O Module 2 Host I/O Connector Pin Assignments, J20 Pin J20PMC I/O Connectors LPaDA+ TX1+ LPaDA-TX1 Ethernet DioralDiordya Serial COM PortsMxsyncl 10BaseT/100BaseTx Connector Pin Assignments 5 10/100/1000BaseTx Connectors6 COM1 And COM2 Connectors MXP Version 10 COM1, COM2 Connector Pin Assignments7 RJ-45 to DB-9 Adapter for COM1 to PC COM1 11 Wire Interconnection List RJ-45 to DB-9RF-45 Signal RJ-45 Pin DB-9 Pin DB-9 Signal RJ-45 to DB-9 Adapter for COM1 to PC COM12 COM1 and COM2 Asynchronous Serial Ports Jumpers Jumper SettingsCompactFlash Jumper 102Functional Description IDE FlashSerial Eeprom Ethernet Interface CompactPCI VersionHot-Swap Support PMC I/O ModulesAsynchronous Serial Ports 6.1 I/O Signal Multiplexing Iomx12 Multiplexing Sequence of the Iomx Function RTS3 CTS3 DTR3 DSR3 RTS1 DCD3 RTS2 CTS1Serial Port Signal Descriptions 106Asynchronous Serial Port Diagrams Synchronous Port Board Connector Jumper HeaderSerial Port Redirection Port Configuration Diagrams PMC I/O Module108 PMC I/O Module Form Factor PMC I/O Module Form FactorPMC I/O Module Presence Detection and Identification PMC I/O ConnectorHost I/O Connector 110Installing the PIM Installing the PIMInstalling the PIM 112Installing the Transition Module Installing the Transition ModuleRemoving the Transition Module in a Hot-Swap Chassis 114Remote Start via the PCI Bus Register DescriptionBit Number Description Command/Response Register DescriptionRemote Start via the PCI Bus 116MOTLoad Firmware MOTLoad DescriptionMOTLoad Implementation and Memory Requirements MOTLoad Tests MOTLoad CommandsMOTLoad Utility Applications MOTLoad FirmwareUsing MOTLoad Command Line InterfaceUsing MOTLoad MOTLoad FirmwareCommand Line Help Command Line HelpCommand Line Rules 120MOTLoad Command List MOTLoad Command ListMOTLoad Commands Command DescriptionMOTLoad FirmwareMOTLoad Command List 122MOTLoad Command ListMOTLoad Firmware 124 Memory Maps Default Processor Memory MapDefault Processor Memory Map Memory MapsProcessor Memory Map Memory MapsProcessor Memory Map126 Default PCI Memory Map Default PCI Memory MapDefault PCI Address Map Suggested PPC Memory MapMemory MapsSuggested PCI Memory Map Suggested PCI Memory MapSuggested PCI Memory Map 128CompactPCI Memory Map System I/O Memory MapPCI Local Bus Memory Map Device Bank 1 I/O Memory MapAddress Decoding with 9 L1, L2 and L3 CacheApollo L3CR Register Assignments Manufacturers’ Documents Related DocumentationEmbedded Communications Computing Documents Table A-1 Motorola ECC DocumentsRelated Specifications Table A-3 Related SpecificationsRelated SpecificationsRelated Documentation MPR-PPC-RPU-02Related Documentation 134Index COM1136