The addresses indicated in the table results from the master configuration started in the basic address. By the internal structure of the Interbus coupler, the process image is divided as follows:
Output data
O0
....
.....word orientated data
....
Ox
Ox+1 bit orientated data
Ox+y
Input data
I0
....
....word orientated data
....
Ix
Ix+1 bit orientated data
Ix+y
Due to this division, the first addresses allocated in the configuration are reserved for the analog inputs and outputs. The counting direction is from left to right and starts with the first analog channel next to the bus coupler.
Ill. 21: Definition inputs/outputs
INTERBUS S / Configuration | 22 |
:$*2Ç,2Ç6<67(0
