Quatech INTERBUS S manual Structure of input and output data, Control Byte, Status Byte

Models: INTERBUS S

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Structure of input and output data:

Structure of input and output data:

The module is a combined analog input and output module with 2 x 16 bit input and output data. The transfer of the data to be transmitted and the received data is made via up to 3 output and 3 input bytes. One control byte and one status byte are used to control the floating data.

Requests are indicated by a change of a bit. An assigned bit indicates execution by adopting the value of the request bit.

Up to 3 characters which have been received via interface can be stored in the input bytes 0 to 2. The output bytes will contain the characters to be sent.

The control byte consists of the following bits:

Bit 7

0

Con- stant value must always be 0.

 

 

 

Control Byte

Bit 6

Bit 5

Bit 4

 

Bit 3

OL2

OL1

OL0

 

0

Frames available in output

 

Constant

area, OL2 is always 0.

 

value must

eg. OL2, OL1, OL0 = 0,1,1

 

always be 0.

3 characters should be sent

 

 

and put into the output.

 

 

 

 

 

 

 

Bit 2

IR

Initialization request

Bit 1

RA

Reception acknow- ledgement

Bit 0

TR

Trans- mission request

The status byte consists of the following bits:

Bit 7

0

Con- stant value must always be 0.

Bit 6

Bit 5

Bit 4

IL2

IL1

IL0

Frames available in input area, IL2 is always 0. eg. IL2,IL1,IL0 = 0,1,0

2 characters were received and reside in input 0 and input 1.

Status Byte

Bit 3

BUF_F

Input buffer is full.

Bit 2

IA

Initialization acknow- ledgement

Bit 1

RR

Reception request

Bit 0

TA

Trans- mission acknow- ledgement

RS232,TTY,RS485￿￿￿￿￿￿￿￿

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Page 133
Image 133
Quatech INTERBUS S manual Structure of input and output data, Control Byte, Status Byte