WFM90D and WFM91D ServiceManual 3-1
Theory of Operation
This section contains a module-leveldescription of the instrument circuitry. The
description is basedon the block diagram in Figure 3--1. (For serialnumbers
below B020100, see Figure 3--2).

Input Board

The signal input and output connectorsare located on the Input board. There are
receiversfor the Audio, Video, and External Reference inputs. This board also
provides an automaticequalizer for serial digital video inputs, a switch for the
video signal reference,and a variable gain circuit for the audio input.
The output of the serial digital video automaticequalizer is routed to the SDI
Interfaceboard for further processing and a video signal is returned from the SDI
Interfaceboard. A signal line, DIG, from the SDI Interface board can disable the
video input amplifier to selectthe video signal from the SDI Interface board or it
can disable the video fromthe S DI Interfaceboard and enable the video from the
video input amplifier.
The video input signal has a DC voltage feedback clampfrom the Bottom board.
The video output signal fromthe Bottom board is routed through the Input
board. The audio variablegain is controlled by the microprocessorserial bus,
which is routed to theInput board from the Top board through the Bottom board.

SDI Interface Board

The equalizedS DI signal fromthe Input board is received on the SDI and
N_SDI lines. A clock extractionand reclocking function provides clock and data
on the SDOP,SDON, SCOP, SCON lines. It also provides the “LOCK” output,
which determineswhether an SDI signal is present. This board also provides a
serial-to-parallelfunction, as well as system detection and EDH functionality.
The paralleldata and clock are then fed to a digital-to-analog converter with
composite encoding functions. The output of the converteris filtered and
amplified beforebeing sent to the Input Board.
The video output amplifiercan be disabled by a low on the DIG line to allow for
an analog input to the Input board. An A/D converter measuresthe voltage on
the CARRIER_DET line to estimate the degradation that the SDI signal has
experienceddue to long cables and so forth.
The entireboard is controlled by a I2C bus with the I2C clock on SCLK and the
I2C data on MOSI.