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4.Enable the desired interrupt you need to receive by setting the desired interrupt bit field within ICIMR to enable the particular Interrupt.
•AAS = 1; Expect an interrupt when Master'sAddress matches yours (ICOAR programmed value).
•ICRRDY = 1; Expect a receive interrupt when a byte worth data sent from the master is ready to be read.
•ICXRDY = 1; Expect to receive interrupt when the transmit register is ready to be written with a new data that is to be sent to the master.
•SCD = 1; Expect to receive interrupt when Stop Condition is detected.
5.Configure the I2C Controller Operating frequency; this is not the serial clock frequency. This should be between 6.7 and 13.3 MHz. Program IPSC to generate a 6.7 to 13.3 MHz operating frequency.
•Prescaled Module Clock Frequency = PLL1 Output Frequency / (IPSC + 1).
6.Configure the I2C Serial Clock Frequency. It is advised to configure this frequency to operate at
400 kHz. This will allow the slave device to be able to attend to all Master speeds. Program ICCH and ICCL.
•400 kHz = I2C Operating Frequency (6.7 to 13.3 MHz from Step 5) / [(ICCH + 5) + (ICCL + 5)].
•If ICCL == ICCH ≥ 400 kHz = Prescaled Module Clock Frequency / [2 × ICCH + 10]
7.Configure the Mode Register.
•MST = 0; Configure the I2C Controller to operate as SLAVE.
•FDF = 0; Free Data Format is disabled.
•BC = 0; Set data width to 8 bytes.
•DLB = 0; Disable Loopback Mode.
•STB = 0; I2C Controller can detect Start condition via hardware.
•RM = 1, STP = 0, STT = 0. See Table 15 (No Activity case).
•Configure remaining bits other than IRS to 0.
8.Release I2C from Reset
•IRS = 1; Make sure you do not over write your previous configurations.
9.Make sure Interrupt Status Register is cleared.
•ICSTR = ICSTR; Clear Interrupt fields that require writing '1'requirements.
•While (ICIVR != 0) Read ICIVR; Read until it is cleared to 0.
10.Instruct I2C Controller to detect START Condition and Its Own Address.
•STT = 1; Make sure you do not over write your previous configurations.
11.MASTER desires to perform a write transfer. If Master requests a Write, I2C needs to receive data, perform the following:
•Wait for Receive Interrupt to be received, ICRRDY = 1.
•Read Data
12.Perform Step 11 until one of the two happens:
•Master generates a STOP Condition (SCD = 1) or
•I2C Slave desires to end receive transfer.
If the latter, then the I2C needs to Not Acknowledge the last byte to be received from the Master. After reading the byte prior from the last byte set NACKMOD bit so that the I2C automatically NACKs the following received data byte, which is the last data byte.
•NACKMOD = 1; set this field on the 2nd data prior from the last.
13.Master desires to perform a read transfer. If Master requests a Read, I2C needs to transmit data, perform the following:
•Write Data.
•Wait for Transmit Interrupt to be received, ICXRDY = 1.
14.Perform step 13 until a STOP condition is detected (SCD = 1).
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