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Table 16. How the MST and FDF Bits Affect the Role of TRX Bit
ICMDR Bit |
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MST | FDF | I2C State | Function of TRX Bit |
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0 | 0 | In slave mode but not free data format | TRX is a don't care. Depending on the command from the master, the I2C |
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| mode | responds as a receiver or a transmitter. |
0 | 1 | In slave mode and free data format | The free data format mode requires that the transmitter and receiver be |
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| mode | fixed. TRX identifies the role of the I2C: |
TRX = 0: The I2C is a receiver.
TRX = 1: The I2C is a transmitter.
10 In master mode but not free data format mode
TRX identifies the role of the I2C:
TRX = 0: The I2C is a receiver.
TRX = 1: The I2C is a transmitter.
1 | 1 | In master mode and free data format | The free data format mode requires that the transmitter and receiver be |
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| mode | fixed. TRX identifies the role of the I2C: |
TRX = 0: The I2C is a receiver.
TRX = 1: The I2C is a transmitter.
Figure 23. Block Diagram Showing the Effects of the Digital Loopback Mode (DLB) Bit
| I2C peripheral |
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| DLB |
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To internal I2C logic | SCL_IN |
| 0 | SCL |
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| 1 | 0 |
From internal I2C logic | SCL_OUT |
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| DLB |
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To internal I2C logic |
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To ARM CPU or EDMA |
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| 0 | SDA |
ICDRR |
| ICRSR |
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| DLB | 1 | 0 |
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From ARM CPU or EDMA | ICSAR | 0 |
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From ARM CPU or EDMA | ICOAR | 1 | ICXSR |
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From ARM CPU or EDMA | ICDXR |
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| Address/data |
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SPRUEN0D | 35 | |
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