Texas Instruments TMS320C642X manual 1.3Functional Block Diagram, I2C Peripheral Block Diagram

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1.3Functional Block Diagram

A block diagram of the I2C peripheral is shown in Figure 1. Refer to Section 2 for detailed information about the architecture of the I2C peripheral.

Figure 1. I2C Peripheral Block Diagram

	I2C peripheral		Peripheral data bus
	ICXSR	ICDXR
SDA			CPU
	ICRSR	ICDRR
		Control/status	EDMA
SCL	Clock	registers
	synchronizer
	Prescaler
	Noise filters	I2C INT	Interrupt
			to CPU
	Arbitrator	ICREVT	Sync events to
		ICXEVT	EDMA controller

1.4Industry Standard(s) Compliance Statement

The I2C peripheral is compliant with the Philips Semiconductors Inter-IC bus (I2C-bus) specification version 2.1.

8 Inter-Integrated Circuit (I2C) Peripheral SPRUEN0D –March 2011

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