Texas Instruments TMS320F20x/F24x DSP manual Margin

PRELIMINARY

Index

M

margin
determining	3-5, 3-11
ensuring data retention 1-2
improving	3-12
in programming 2-13
restoring after flash±write operation 2-15
special read modes for ensuring		2-12
masking data in program operation		3-8
memory maps	1-4

MODE bit 2-6

See also flash access±control register

mode selection for access	2-6
modifying the array contents	2-2, 2-16
module±control register 2-8

multiple reads at same location 3-5, 3-17

N

notational conventions iv

O

OUT instruction 2-7 over±erasure 2-14, 2-15, 3-14

P

program operation
described		2-13
frequency range			3-5
latching the write address				2-10
latching the write data 2-11
logic levels		2-4
masking off upper or lower bits					2-13
specifying write address				2-13
VER0 read mode			2-13
verification of programmed bits					2-12
worst±case voltage for reading programmed
cell	2-12
program pulse
applying a series			3-8
defined	2-13
program() function (code listing)					A-27

programming algorithm

assembly code (SPGM2x.ASM) A-19

described 3-4 to 3-9

flow diagram	3-6
in overall flow	3-4

versus clear algorithm 3-2

programming the flash memory. See program opera- tion

protection from unintentional erasure 2-16, 3-11

R

read mode, standard	2-12
read modes 2-12
reading from the array	2-16
recovery from over±erasure 2-15
register±access mode	2-5, 2-10, 2-11
See also array±access mode
related documentation	v
reprogrammability 1-1, 2-14, 2-15, A-1
reserving space for code A-2
retention of data. See data retention

S

SCLR2x.ASM file A-5
segment control register (SEG_CTR)						2-8
described	2-8
in erase operation		2-14
in flash±write operation			2-15
in mechanism for array protection						2-16
in mode selection		2-6
in program operation 2-13
relation to flash±write pulse				3-14
role in single erase pulse			3-11
role in single flash±write pulse					3-15
role in single program pulse				3-8
segment enable bits (SEG0±SEG7)
described	2-9
in mechanism for array protection						2-16
location in SEG_CTR register					2-8
role in single erase pulse			3-11
role in single flash±write pulse					3-15
role in single program pulse				3-8
segment locations in array			2-10
SERA2x.ASM file (erase algorithm code) A-10
SFLW2x.ASM file (flash±write algorithm code							A-15
space for code	A-2
SPGM2x.ASM file (program algorithm code)							A-19

PRELIMINARY Index-3