Texas Instruments TMS320F20x/F24x DSP manual Preliminary, Programming or Clear Algorithm

Programming (or Clear) Algorithm

PRELIMINARY

Table 3±1. Steps for Verifying Programmed Bits and Applying One Program or Clear Pulse (Continued)

Step	Action		Description
7	Mask the data to program		Mask any bits in the lower byte that do not require programming (are al-
	lower byte.		ready read as zero), and mask off upper byte. Recall that the algorithm
			should mask one byte while programming the other because a maximum
			of eight bits can be programmed simultaneously.
8	Load WADRS and WDATA		If the flash module is in array access mode, write the data to be pro-
	registers.		grammed to its address. If the flash module is in register access mode,
			load the individual registers directly.
10	Activate the WRITE/ERASE		Set the WRITE/ERASE field in SEG_CTR to 10 and set the correspond-
	field and enable segments.		ing segment enable bits (SEG0±SEG7) for the segments where the pro-
			grammed word resides.
² See the device data sheet for the timing parameter values.
11	Wait for internally generated		The CPU executes a delay loop for the td(PGM±MODE² ) time period.
	supply voltage stabilization
	time.
12	Initiate the program pulse.		Load the EXE, KEY1, and KEY0 bits with 1, 1, and 0, respectively. All
			three bits must be loaded in the same write cycle.
			The segment enable bits and the WRITE/ERASE field must also be
			maintained.
13	Delay for	program pulse	The CPU executes a delay loop for the td(PGM² ) time period.
	time.
14	Terminate	the program	Clear the WRITE/ERASE field and EXE bit in SEG_CTR (e.g., load
	pulse.		SEG_CTR with 0000h).
15	Delay for array stabilization		The CPU executes a delay loop for the td(BUSY² ) time period.
	time.

16±25 Program upper byte if nec- essary.

Repeat steps 7±15 for the upper byte. Mask the lower byte to 1s when programming the upper byte.

²See the device data sheet for the timing parameter values.

3-8 PRELIMINARY