Avid Start

Functional Description

DATACLK

Y[9:0]

EAV

SAV

Horizontal Blanking

Cb0

Cr0

HS Start HS Stop

AVID

AVID Stop

DATACLK = 2⋅ Pixel Clock

Mode	A	B	C	D

NTSC 601	106	128	42	276

PAL 601	112	128	48	288

NOTE: ITU-R BT.656 10-bit 4:2:2 timing with 2⋅ pixel clock reference

Figure 2−14. Horizontal Synchronization Signals for 10-Bit 4:2:2 Mode

SLES140A—March 2007

TVP5147M1PFP

Page 27

Image 27

Texas Instruments TVP5147M1PFP manual Horizontal Blanking Cb0 Cr0 HS Start HS Stop, Avid Stop Dataclk = 2⋅ Pixel Clock Mode

TVP5147M1PFP specifications

The Texas Instruments TVP5147M1PFP is a versatile video decoder that stands out in the realm of analog video processing. This device is particularly designed for high-quality video applications, making it an excellent choice for a variety of consumer and professional electronics that require reliable video decoding capabilities.

One of the main features of the TVP5147 is its ability to decode multiple video formats, including NTSC, PAL, and SECAM. This flexibility allows the decoder to seamlessly interface with various video sources from different geographic regions, providing a global solution for video applications. The TVP5147 includes advanced synchronization features, ensuring it can effectively handle video signals that may vary in timing and quality.

The device is equipped with a sophisticated 10-bit analog-to-digital converter (ADC), which enhances the precision and clarity of the digital video output. This high-resolution capability allows for improved color accuracy and detail, leading to a more lifelike video representation. Additionally, the TVP5147 utilizes advanced digital processing technologies, including noise reduction and image enhancement features, contributing to outstanding image quality even in less than ideal input conditions.

Another notable characteristic of the TVP5147M1PFP is its support for various output formats, including ITU-R BT.601 and 656, which facilitates easy integration into different systems. The device can also provide various output resolutions, catering to the needs of diverse applications ranging from standard definition to high definition displays.

In terms of connectivity, the TVP5147 offers multiple input options, including composite video, S-video, and component video interfaces. This versatility ensures that it can accommodate a wide range of video sources, from traditional VHS players to modern digital cameras. Furthermore, the integrated video control features allow for easy adjustment of parameters such as brightness, contrast, and saturation.

The power consumption of the TVP5147M1PFP is optimized for low-energy applications while maintaining high performance, making it suitable for battery-powered devices and energy-efficient designs. Overall, the Texas Instruments TVP5147M1PFP is an exceptional video decoder that blends flexibility, high quality, and advanced technology, making it a preferred choice for video processing in numerous consumer and industrial applications. Its combination of features ensures reliable performance and high-quality output, fulfilling the demands of modern multimedia environments.

Contents

Data Manual Important Notice Contents Section 11.11 Section 11.59 Example List of Illustrations List of Tables Introduction Detailed Functionality Packaged Devices TVP5147M1 ApplicationsRelated Products Ordering Information Functional Block Diagram PFP Package TOP View Terminal Assignments Terminal Description Name Number Miscellaneous SignalsTerminal Functions −1. Terminal Functions VS/VBLK/GPIO Sync Signals Introduction ADC Video Input Switch ControlAnalog Processing and A/D Converters PGA 5 A/D Converters Analog Input ClampingAutomatic Gain Control Analog Video Output Digital Video Processing 1 2⋅ Decimation FilterComposite Processor CVBS/C NTSC/PAL −10 −10 − dB −20−30 −40 −50 −60 −70 Luminance Processing Color Transient ImprovementOUT Clock Circuits Real-Time Control RTCOutput Formatter Name Number Separate Syncs−1. Output Format Terminal Line 525 First Field Video VS Start FID VblkVblk Start Vblk Start 23 24 Vblk Stop 336 337 622 623 624 625 First Field Video VS Start Avid Stop Dataclk = 2⋅ Pixel Clock Mode Horizontal Blanking Cb0 Cr0 HS Start HS StopAvid Start Avid Stop Dataclk = 1⋅ Pixel Clock Mode −15. Horizontal Synchronization Signals for 20-Bit 422 Mode D9 MSB Embedded SyncsI2C Host Interface −3. EAV and SAV Sequence −4. I 2C Host Interface Terminal Description Reset and I2C Bus Address SelectionVbus Access 2 I2C Operation WSS Vitc HostI2C Vbus VBI Data Processor −6. Supported VBI SystemVBI System Standard Line Number Number of Bytes LSB VBI Fifo and Ancillary Data in Video Stream−7. Ancillary Data Format and Sequence Byte Description −8. VBI Raw Data Output Format Reset and Initialization−9. Reset Sequence VBI Raw Data Output −10. I 2C Register Summary Adjusting External SyncsRegister Name 2C Subaddress Default Internal Control Registers Vblk start line V bit control 75h 12h VCR trick mode control 76h −11. Vbus Register Summary Input Select Register −12. Analog Channel and Video Mode SelectionMode Inputs Selected Input Select Output HEX Register Definitions AFE Gain Control Register Video Standard RegisterCvbs and S-Video Component Video Operation Mode Register Autoswitch Mask RegisterSubaddress 03h Default 00h Luminance Processing Control 1 Register Color Killer Register Luminance Brightness Register Subaddress 08h Default 02h Reserved Trap filter selectLuminance Processing Control 2 Register Luminance Processing Control 3 Register Chrominance Processing Control 1 Register Luminance Contrast RegisterChrominance Saturation Register Chroma Hue Register WCF Subaddress 0Eh DefaultChrominance Processing Control 2 Register Avid Start Pixel Register Vsync Start Line Register Avid Stop Pixel RegisterHsync Start Pixel Register Hsync Stop Pixel Register Vblk Stop Line Register CTI Delay RegisterVsync Stop Line Register Vblk Start Line Register Subaddress 2Eh Default 00h CTI coring CTI gain CTI Control RegisterSync Control Register CbCr code Reserved Subaddress 33h Default 40hOutput Formatter 1 Register Output Formatter 2 Register Output Formatter 3 Register Output Formatter 4 Register Output Formatter 5 Register Subaddress 39h Default 00h Output Formatter 6 RegisterClear Lost Lock Detect Register Read only Status 1 Register Subaddress 3Ch Fine gain 3Dh Coarse gain Status 2 RegisterAGC Gain Status Register Color killed Gpio Input 1 Register Video Standard Status Register Glco FID Gpio Input 2 Register AFE Coarse Gain for CH 2 Register Subaddress 46h Default 20h Cgain 1 ReservedSubaddress 47h Default 20h Cgain 2 Reserved AFE Coarse Gain for CH 1 Register AFE Coarse Gain for CH 4 Register Subaddress 48h Default 20h Cgain 3 ReservedSubaddress 49h Default 20h Cgain 4 Reserved AFE Coarse Gain for CH 3 Register AFE Fine Gain for Pb Register AFE Fine Gain for YChroma RegisterAFE Fine Gain for Pr Register FID control Subaddress 57h Default 00hAFE Fine Gain for CVBSLuma Register Field ID Control Register Bit and V-bit Control 1 Register Subaddress 69h Default 00hBit mode Reg 69h Reg 75h Mode Standard LPF Nonstandard LPF Bit Back-End AGC Control Register AGC Decrement Speed Control RegisterROM Version Register Subaddress 74h Default 00h Luma peak a AGC White Peak Processing RegisterLuma peak B Composite peak Lines per frame Bit V Bit Control Register AGC Increment Speed Register VCR Trick Mode Control RegisterAGC Increment Delay Register Horizontal Shake Increment Register Cpll Speed Control Register Analog Output Control 1 RegisterChip ID MSB Register Chip ID LSB Register AGC Decrement Delay Register Status Request RegisterVertical Line Count Register VDP TTX Filter And Mask Registers VDP TTX Filter Control Register Pass VDP Fifo Word Count RegisterNibble Filter VDP Line Number Interrupt Register VDP Fifo Reset RegisterVDP Fifo Interrupt Threshold Register VDP Fifo Output Control Register VDP Line Stop Register VDP Global Line Mode RegisterVDP Pixel Alignment Register VDP Line Start Register Vbus Data Access With Vbus Address Increment Register VDP Full Field Enable RegisterVDP Full Field Mode Register Vbus Data Access With No Vbus Address Increment Register Fifo Thrs TTX WSS VPS Vitc CC F2 CC F1 Vbus Address Access RegisterFifo Read Data Register Interrupt Raw Status 0 Register Fifo full Interrupt Raw Status 1 RegisterInterrupt Status 0 Register Reserved Lock Interrupt Status 1 Register Interrupt Mask 0 Register Subaddress F5h Default 00h Interrupt Mask 1 RegisterInterrupt Clear 0 Register Interrupt Clear 1 Register Subaddress F7h Default 00h Subaddress Byte Vbus Register DefinitionsVDP Closed Caption Data Register VDP WSS Data Register VDP Vitc Data Register VDP V-Chip TV Rating Block 1 RegisterVDP V-Chip TV Rating Block 2 Register TV-PG VDP V-Chip TV Rating Block 3 RegisterVDP V-CHIP Mpaa Rating Data Register None Default line mode = FFh, address = 00h VDP General Line Mode and Line Address Register VPS Read only VDP VPS/Gemstar Data Register Analog Output Control 2 Register Interrupt Configuration Register Recommended Operating Conditions Crystal SpecificationsCrystal Specifications MIN NOM MAX Unit Absolute Maximum Ratings† Parameter Test Conditions MIN TYP MAX Unit Electrical CharacteristicsDC Electrical Characteristics see Note Analog Processing and A/D Converters VC1 SDA VC0 SCL TimingDataclk AVID, VS, HS, FID VOH VOL Electrical Specifications Recommended Settings ExampleAssumptions Assumptions Example Register Settings Example Register Settings −1. Example Application Circuit Application Example Designing With PowerPADt Devices Orderable Device Status Package Pins Package Eco Plan MSL Peak TempQty Page

Texas Instruments TVP5147M1PFP manual Horizontal Blanking Cb0 Cr0 HS Start HS Stop, Avid Start

Models: TVP5147M1PFP