Functional Description
HOST
Processor
00h
I2C
E0h
E1h
E8h
EAh
FFh
I2C Registers
VBUS
Data
VBUS
Address
VBUS[23:0]
VBUS Registers
CC
WSS
VITC
Line
Mode
VPS
FIFO
00 0000h
80051Ch
800520h
80052Ch
800600h
800700h
901904h
FF FFFFh
VBUS Write
Single Byte
| S | B8 | ACK | E8 | ACK | VA0 |
| ACK | VA1 | ACK | VA2 | ACK | P |
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| S | B8 | ACK | E0 | ACK | Send Data | ACK | P |
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| S | B8 | ACK | E8 | ACK | VA0 |
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| S | B8 | ACK | E1 | ACK | Send Data | ACK | Send Data | ACK | P | |||||||||||
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VBUS Read |
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| Single Byte |
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| S | B8 | ACK | E8 | ACK | VA0 |
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| S | B8 | ACK | E0 | ACK | S |
| B9 | ACK | Read Data | NAK | P |
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| S | B8 | ACK | E8 | ACK | VA0 |
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S B8 ACK E1 ACK S B9 ACK Read Data ACK • • •
NOTE: Examples use default I2C address
ACK = Acknowledge generated by the slave
NAK = No acknowledge generated by the master
Read Data NAK P
Figure 2−17. VBUS Access
TVP5147M1PFP | 23 |