Example Register Settings
4 Example Register Settings
The following example register settings are provided only as a reference. These settings, given the assumed input connector, video format, and output format, set up the TVP5147M1 decoder and provide video output. Example register settings for other features and the VBI data processor are not provided here.
4.1Example 1
4.1.1 Assumptions
Input connector: Composite (VI_1_A) (default)
Video format: | NTSC (J, M), PAL (B, G, H, I, N) or SECAM (default) |
NOTE:
Output format: |
4.1.2 Recommended Settings
Recommended I2C writes: For the given assumptions, only one write is required. All other registers are set up by default.
I2C register address 08h = Luminance processing control 3 register
I2C data 00h = Optimizes the trap filter selection for NTSC and PAL
I2C register address 0Eh = Chrominance processing control 2 register
I2C data 04h = Optimizes the chrominance filter selection for NTSC and PAL
I2C register address 34h = Output formatter 2 register
I2C data 11h = Enables YCbCr output and the clock output
NOTE: HS/CS, VS/VBLK, AVID, FID, and GLCO are logic inputs by default. See output formatter 3 and 4 registers at addresses 35h and 36h, respectively.
4.2 | Example 2 |
4.2.1 | Assumptions |
Input connector: | |
Video format: | NTSC (J, M, 443), PAL (B, D, G, H, I, N, Nc, 60) or SECAM (default) |
Output format: |
4.2.2 Recommended Settings
Recommended I2C writes: This setup requires additional writes to output the discrete sync
TVP5147M1PFP | 83 |