Functional Description
0
DATACLK
Y[9:0] |
| Y | Y | Y | Y |
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CbCr[9:0] |
| Cb | Cr | Cb | Cr |
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HS
Horizontal Blanking
Horizontal Blanking
HS Start HS Stop
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| Y0 | Y1 | Y2 | Y3 |
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Cb0 Cr0 Cb1 Cr1
A
AVID
C
B | 2 |
D
AVID Stop
NOTE: AVID rising edge occurs 4 clock cycles early.
DATACLK = 1⋅ Pixel Clock
Mode | A | B | C | D |
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NTSC 601 | 53 | 64 | 19 | 136 |
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PAL 601 | 56 | 64 | 22 | 142 |
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NOTE:
AVID Start
Figure 2−15. Horizontal Synchronization Signals for 20-Bit 4:2:2 Mode
20 | TVP5147M1PFP |