Spectrum Brands MC.31XX manual Setting up the inputs, Input ranges

Page 43

Analog Inputs

Setting up the inputs

 

 

Setting up the inputs

Input ranges

This analog acquisition board uses separate input amplifiers and converters on each channel. This gives you the possibility to set up the de- sired and concerning your application best suiting input range also separately for each channel. The input ranges can easily be set by the corresponding input registers. The table below shows the available input registers and possible standard ranges for your type of board. As there are also modified version availble with different input ranges it is recommended to read out the currently available input ranges as shown later in this chapter.

Register

Value

Direction

Description

SPC_AMP0

30010

r/w

Defines the input range of channel0.

SPC_AMP1

30110

r/w

Defines the input range of channel1.

 

 

 

 

SPC_AMP2

30210

r/w

Defines the input range of channel2.

 

 

 

 

SPC_AMP3

30310

r/w

Defines the input range of channel3.

SPC_AMP4

30410

r/w

Defines the input range of channel4.

 

 

 

 

SPC_AMP5

30510

r/w

Defines the input range of channel5.

 

 

 

 

SPC_AMP6

30610

r/w

Defines the input range of channel6.

SPC_AMP7

30710

r/w

Defines the input range of channel7.

 

50

± 50 mV calibrated input range for the appropriate channel.

 

 

 

 

100

± 100 mV calibrated input range for the appropriate channel.

 

200

± 200 mV calibrated input range for the appropriate channel.

 

 

 

 

500

± 500 mV calibrated input range for the appropriate channel.

 

 

 

 

1000

± 1 V calibrated input range for the appropriate channel.

 

2000

± 2 V calibrated input range for the appropriate channel.

 

 

 

 

5000

± 5 V calibrated input range for the appropriate channel.

 

 

 

 

10000

± 10 V calibrated input range for the appropriate channel.

The different input ranges are set with the help of relais. These relais need a settling time if they are changed, so that the relais are fully set and didn’t influence the signal when the board is started. The following table shows the related register to adjust the wait time. Any changes of the wait time below the default value should only be done after detailed tests of the boards behaviour. Setting lower values may be possible or may not be possible depending on the application that is done.

Register

Value

Direction

Description

SPC_RELAISWAITTIME

200700

read/write

Wait time in ms for relais settling before the start of the board. Default value is 50 ms.

If you want to know, how many different input ranges are available on the actual board per channel, you can easily read that information by using the read-only register shown in the table below.

Register

Value

Direction

Description

SPC_READIRCOUNT

3000

r

Informs about the number of the board’s calibrated input ranges.

Additionally cou can read out the minimum and the maximum value of each input range as shown in the table below. The number of input ranges is read out with the above shown register.

Register

Value

Direction

Description

SPC_READRANGEMIN0

4000

r

Gives back the minimum value of input range 0 in mV.

SPC_READRANGEMIN1

4001

r

Gives back the minimum value of input range 1 in mV.

 

 

 

 

SPC_READRANGEMIN2

4002

r

Gives back the minimum value of input range 2 in mV.

...

...

r

...

 

 

 

 

SPC_READRANGEMAX0

4100

r

Gives back the maximum value of input range 0 in mV.

SPC_READRANGEMAX1

4101

r

Gives back the maximum value of input range 1 in mV.

SPC_READRANGEMAX2

4102

r

Gives back the maximum value of input range 2 in mV.

 

 

 

 

...

...

r

...

The following example reads out the number of available input ranges and reads and prints the minimum and maximum value of all input ranges.

SpcGetParam

(hDrv, READIRCOUNT,

&lNumberOfRanges);

for (i = 0;

i <

lNumberOfRanges; i++)

 

{

 

(hDrv, SPC_READRANGEMIN0 + i, &lMinimumInputRage);

SpcGetParam

SpcGetParam

(hDrv, SPC_READRANGEMAX0 + i, &lMaximumInputRange);

printf („Range %d: %d mV to %d mV\n“, i, lMinimumInputRange, lMaximumInputRange);

}

(c) Spectrum GmbH

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Contents English version April 27 MC.31xxPage Software Hardware InstallationSoftware Driver Installation IntroductionStandard acquisition modes Fifo ModeProgramming the Board Analog InputsOption Extra I/O Option Multiple RecordingOption Gated Sampling Option TimestampPreface IntroductionPreface General InformationMC.3110 MC.3120 MC.3130 MC.3111 MC.3121 MC.3131 Different models of the MC.31xx seriesIntroduction MC.3112 MC.3122 MC.3132 Introduction Additional options Additional optionsDigital inputs Extra I/O Option -XMFTimestamp StarhubSpectrum type plate Hardware information Block diagram Technical DataOrder No Description Dynamic ParametersOrder information IntroductionHardware informationInstalling the board in the system Hardware InstallationSystem Requirements Installing a board with extra I/O Option -XMF Installing a board with digital inputs/outputsHardware Installation Only use the included flat ribbon cables Installing multiple boards synchronized by starhubMounting the wired boards Hooking up the boardsInstalling multiple synchronized boards Interrupt Sharing Software Driver InstallationInterrupt Sharing Version control InstallationSoftware Driver Installation Windows WindowsDriver Update Windows Driver Update Windows XP Software Driver InstallationWindows XP Windows NT Software Driver Installation Windows NTAdding boards to the Windows NT driver Overview LinuxAutomatic load of the driver Installing the deviceNow it is possible to access the board using this device Driver infoSoftware Overview SoftwareSoftware Overview First Test with SBenchBorland C++ Builder ++ Driver InterfaceHeader files Microsoft Visual C++Include Drivers Other Windows C/C++ compilersNational Instruments LabWindows/CVI Driver functionsFunction SpcSetData Windows Software ++ Driver Interface Using the Driver under LinuxFunction SpcSetParam Function SpcSetParamExamples Delphi Pascal Programming InterfaceType definition Include DriverSoftware Visual Basic Examples Visual Basic Programming InterfaceVBA for Excel Examples Visual Basic Programming Interface Register tables Error handlingProgramming the Board OverviewPCI Register Example for error checkingInitialization Starting the automatic initialization routineDate of production Installed memoryInstalled features and options Hardware versionDriver version Used interrupt lineUsed type of driver Programming the Board InitializationSpcpciserialno Powerdown and resetExample program for the board initialization SpcpcimemsizeAnalog Inputs Analog InputsChannel Selection Important note on channels selectionSPCCHROUTE1 Channel reroutingRerouting information for module SPCCHROUTE0Input ranges Setting up the inputsRegister Value Direction Description Offset range Input offsetOverrange bit Automatical adjustment of the offset settingsInput termination Spcadjsave ADJUSER0 Spcadjautoadj AdjallPretrigger = memsize posttrigger Standard acquisition modesProgramming Memory, Pre- and PosttriggerMinimum memsize and posttrigger in samples Starting without interrupt classic modeCommand register Maximum posttrigger in MSamplesStandard acquisition modes Programming Starting with interrupt driven modeStatus register Data organization Normal modeFast 8 bit mode 201100 Enables the fast 8 bit modeValue ’len’ as a 32 bit integer value Standard modeReading out the data with SpcGetData Value ’start’ as a 32 bit integer valueProgramming Speed Limitations Fifo ModeGeneral Information Background Fifo Read60040 Read out the number of available Fifo buffers Programming Fifo ModeSoftware Buffers Theoretical maximum sample rate PCI Bus ThroughputDigital I/O 701x or 702x or pattern generator boards Fifo Mode ProgrammingBuffer processing Analog acquisition or generation boardsSpcfifowait Example Fifo acquisition modeFifo acquisition example SpcfifostartSample format Internally generated sample rate Clock generationStandard internal sample rate Clock generation Using plain quartz without PLLMaximum internal sample rate in MS/s normal mode External reference clockMaximum external samplerate in MS/s External clockingDirect external clock Minimum external sample rateCHANNEL0 CHANNEL1 CHANNEL2 CHANNEL3 External clock with dividerFifo External TTL trigger Trigger modes and appendant registersGeneral Description Software triggerPositive TTL trigger Example on how to set up the board for positive TTL triggerEdge triggers Trigger modes and appendant registersTTL pulsewidth trigger for short High pulses Pulsewidth triggersPositive and negative TTL trigger TTL pulsewidth trigger for long High pulsesSpcpulsewidth TTL pulsewidth trigger for long LOW pulsesTTL pulsewidth trigger for short LOW pulses Spctriggermode TmttlhighlpTmchxoff Channel TriggerOverview of the channel trigger registers Spctriggermode TmchannelSPCTRIGGERMODE2 Tmchxoff TriggerlevelSpctriggermode Tmchor SPCTRIGGERMODE0 TmchxoffInput ranges Triggerlevel ±50 mV ±100 mV ±200 mV ±500 mV Reading out the number of possible trigger levelsSPCTRIGGERMODE0 Tmchxpos SPCHIGHLEVEL0Channel trigger on positive and negative edge Detailed description of the channel trigger modesChannel trigger on positive edge Channel trigger on negative edgeChannel pulsewidth trigger for long negative pulses Channel pulsewidth trigger for long positive pulsesChannel pulsewidth trigger for short negative pulses Channel pulsewidth trigger for short positive pulsesTmchxposgsp Channel steepness trigger for flat negative pulses Channel steepness trigger for flat positive pulsesChannel steepness trigger for steep negative pulses Channel steepness trigger for steep positive pulsesChannel window trigger for leaving signals Channel window trigger for entering signalsChannel window trigger for long outer signals Channel window trigger for long inner signalsChannel window trigger for short outer signals Channel window trigger for short inner signalsRecording modes Standard ModeWhen using Multiple Recording pretrigger is not available Option Multiple RecordingSpctriggermode Resulting start delaysTrigger modesOption Multiple Recording SpcmemsizeSpcgate General information and trigger delayOption Gated Sampling Option Gated SamplingAlignement samples per channel End of gate alignementExternal TTL edge trigger Number of samples on gate signalAllowed trigger modes Option Gated SamplingTrigger modesSpctriggermode Tmttlpos Example programExample program Option Gated Sampling Channel triggerLimits StartReset modeOption Timestamp Timestamp modesReading out timestamp data RefClock mode optionalFunctions for accessing the data Timestamp StatusSpcGetData nr, ch, start, len, data Data formatSpctimestampcount Example programs Standard acquisition modeAcquisition with Multiple Recording Channel direction Option Extra I/ODigital I/Os Analog OutputsProgramming example Option Extra I/O Programming exampleSpcreaddigital Bit Standard Mode Digital Inputs enabledOption Digital inputs Sample formatSynchronization with option starhub Synchronization OptionDifferent synchronization options Synchronization with option cascadingWrite Data to on-board memory output boards only Setup order for the different synchronization optionsSet up the board parameters Let the master calculate it’s clocking4a Define synchronization or trigger Example for data writingDefine the boards for trigger master Example of board #2 set as trigger masterArm the boards for synchronization Define the board for clock masterExample board number 0 is clock master Define the remaining boards as clock slavesRestarting the board for another synchronized run Start all of the trigger master boardsWait for the end of the measurement Read data from the on-board memory acquisition boards onlySpcsyncslavefifo Example of Fifo buffer allocation2a Write first data for output boards SpcsyncmasterfifoGeneral information Additions for synchronizing different boards20xx 30xx 31xx 40xx 45xx 60xx 61xx 70xx 72xx Calculating the clock dividersBoard type 3025 3131 Setting up the clock dividerBoard type 3122 3120 40 MS/sAdditions for equal boards with different sample rates Resulting delays using different boards or speedsDelay in standard non Fifo modes Delay in Fifo modeAppendix Error CodesError Codes Error name Value hex Value dec Error descriptionExtra I/O with external connectorOption -XMF Pin assignment of the multipin connectorOption Digital inputs Pin assignment of the multipin cable
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