Spectrum Brands MC.31XX Channel Trigger, Overview of the channel trigger registers, Tmchxoff

Page 66

Channel Trigger

Trigger modes and appendant registers

 

 

Channel Trigger

Overview of the channel trigger registers

The channel trigger modes are the most common modes, compared to external equipment like oscilloscopes. The 17 different channel trigger modes enable you to observe nearly any part of the analog signal. This chapter is about to explain the different modes in detail. To enable the channel trigger, you have to set the triggermode register accordingly. Therefore you have to choose, if you either want only one channel to be the trigger source, or if you want to combine two or more channels to a logical OR trigger. The following table shows the according registers for the two general channel trigger modes.

Register

Value

Direction

Description

SPC_TRIGGERMODE

40000

r/w

Sets the triggermode for the board.

 

TM_CHANNEL

20040

Enables the channel trigger mode so that only one channel can be a trigger source.

 

TM_CHOR

35000

Enables the channel trigger mode so that more than one channel can be a trigger source.

If you have set the general triggermode to channel trigger you must set the all of the channels to their modes according to the following table.

So even if you use TM_CHANNEL and only want to observe one channel, you need to deactivate all other channels. You can do this by setting the channel specific register to the value TM_CHXOFF.

The tables lists the maximum of the available channel mode registers for your card’s series. So it can be that you have less channels installed on your specific card and therefore have less valid channel mode registers. If you try to set a channel, that is not installed on your specific card, a error message will be returned.

Register

Value

Direction

Description

SPC_TRIGGERMODE0

40200

r/w

Sets the channel trigger for channel0. Channeltrigger must be activated with SPC_TRIGGERMODE.

SPC_TRIGGERMODE1

40201

r/w

Sets the channel trigger for channel1. Channeltrigger must be activated with SPC_TRIGGERMODE.

 

 

 

 

 

SPC_TRIGGERMODE2

40202

r/w

Sets the channel trigger for channel2. Channeltrigger must be activated with SPC_TRIGGERMODE.

 

 

 

 

 

SPC_TRIGGERMODE3

40203

r/w

Sets the channel trigger for channel3. Channeltrigger must be activated with SPC_TRIGGERMODE.

SPC_TRIGGERMODE4

40204

r/w

Sets the channel trigger for channel4. Channeltrigger must be activated with SPC_TRIGGERMODE.

SPC_TRIGGERMODE5

40205

r/w

Sets the channel trigger for channel5. Channeltrigger must be activated with SPC_TRIGGERMODE.

 

 

 

 

 

SPC_TRIGGERMODE6

40206

r/w

Sets the channel trigger for channel6. Channeltrigger must be activated with SPC_TRIGGERMODE.

SPC_TRIGGERMODE7

40207

r/w

Sets the channel trigger for channel7. Channeltrigger must be activated with SPC_TRIGGERMODE.

 

TM_CHXOFF

10020

Channel is not used for trigger detection.

 

 

 

 

 

TM_CHXPOS

10000

Enables the trigger detection for positive edges

 

TMCHXNEG

10010

Enables the trigger detection for negative edges

 

TMCHXBOTH

10030

Enables the trigger detection for positive and negative edges

 

 

 

 

 

TM_CHXPOS_LP

10001

Enables the pulsewidth trigger detection for long positive pulses

 

TMCHXNEG_LP

10011

Enables the pulsewidth trigger detection for long negative pulses

 

TM_CHXPOS_SP

10002

Enables the pulsewidth trigger detection for short positive pulses

 

 

 

 

 

TMCHXNEG_SP

10012

Enables the pulsewidth trigger detection for short negative pulses

 

TM_CHXPOS_GS

10003

Enables the steepness trigger detection for flat positive pulses

 

TMCHXNEG_GS

10013

Enables the steepness trigger detection for flat negative pulses

 

 

 

 

 

TM_CHXPOS_SS

10004

Enables the steepness trigger detection for steep positive pulses

 

TMCHXNEG_SS

10014

Enables the steepness trigger detection for steep negative pulses

 

TM_CHXWINENTER

10040

Enables the window trigger for entering signals

 

 

 

 

 

TM_CHXWINLEAVE

10050

Enables the window trigger for leaving signals

 

TM_CHXWINENTER_LP

10041

Enables the window trigger for long inner signals

 

TM_CHXWINLEAVE_LP

10051

Enables the window trigger for long outer signals

 

 

 

 

 

TM_CHXWINENTER_SP

10042

Enables the window trigger for short inner signals

 

TM_CHXWINLEAVE_SP

10052

Enables the window trigger for short outer signals

So if you want to set up a four channel board to detect only a positive edge on channel0, you would have to setup the board like the following example. Both of the examples either for the TM_CHANNEL and the TM_CHOR triggermode do not include the necessary settigs for the triggerlevels. These settings are detailed described in the following paragraphs.

SpcSetParam (hDrv,

SPC_TRIGGERMODE ,

TM_CHANNEL);

// Enable channel trigger mode

SpcSetParam (hDrv, SPC_TRIGGERMODE0, TM_CHXPOS );

// Set triggermode of channel0 to positive edge trigger

SpcSetParam (hDrv, SPC_TRIGGERMODE1,

TM_CHXOFF );

// Disable channel1 concerning trigger detection

SpcSetParam (hDrv, SPC_TRIGGERMODE2,

TM_CHXOFF );

// Disable channel2 concerning trigger detection

SpcSetParam (hDrv, SPC_TRIGGERMODE3,

TM_CHXOFF );

// Disable channel3 concerning trigger detection

SpcSetParam (hDrv, SPC_TRIGGERMODE4,

TM_CHXOFF );

// Disable channel4 concerning trigger detection

SpcSetParam (hDrv, SPC_TRIGGERMODE5,

TM_CHXOFF );

// Disable channel5 concerning trigger detection

SpcSetParam (hDrv, SPC_TRIGGERMODE6,

TM_CHXOFF );

// Disable channel6 concerning trigger detection

SpcSetParam (hDrv, SPC_TRIGGERMODE7,

TM_CHXOFF );

// Disable channel7 concerning trigger detection

 

 

 

 

66

MC.31xx Manual

Page 65 Page 67
Image 66
Page 65 Page 67
Contents MC.31xx English version April 27Page Introduction Hardware InstallationSoftware Driver Installation SoftwareAnalog Inputs Fifo ModeProgramming the Board Standard acquisition modesOption Timestamp Option Multiple RecordingOption Gated Sampling Option Extra I/OGeneral Information IntroductionPreface PrefaceDifferent models of the MC.31xx series MC.3110 MC.3120 MC.3130 MC.3111 MC.3121 MC.3131Introduction MC.3112 MC.3122 MC.3132 Extra I/O Option -XMF Additional optionsDigital inputs Introduction Additional optionsStarhub TimestampSpectrum type plate Block diagram Technical Data Hardware informationIntroductionHardware information Dynamic ParametersOrder information Order No DescriptionHardware Installation Installing the board in the systemSystem Requirements Installing a board with digital inputs/outputs Installing a board with extra I/O Option -XMFHardware Installation Hooking up the boards Installing multiple boards synchronized by starhubMounting the wired boards Only use the included flat ribbon cablesInstalling multiple synchronized boards Software Driver Installation Interrupt SharingInterrupt Sharing Windows InstallationSoftware Driver Installation Windows Version controlDriver Update Windows Driver Update Software Driver Installation Windows XPWindows XP Software Driver Installation Windows NT Windows NTAdding boards to the Windows NT driver Linux OverviewDriver info Installing the deviceNow it is possible to access the board using this device Automatic load of the driverFirst Test with SBench SoftwareSoftware Overview Software OverviewMicrosoft Visual C++ ++ Driver InterfaceHeader files Borland C++ BuilderDriver functions Other Windows C/C++ compilersNational Instruments LabWindows/CVI Include DriversFunction SpcSetParam Software ++ Driver Interface Using the Driver under LinuxFunction SpcSetParam Function SpcSetData WindowsInclude Driver Delphi Pascal Programming InterfaceType definition ExamplesSoftware Visual Basic Programming Interface Visual Basic ExamplesVBA for Excel Examples Visual Basic Programming Interface Overview Error handlingProgramming the Board Register tablesStarting the automatic initialization routine Example for error checkingInitialization PCI RegisterHardware version Installed memoryInstalled features and options Date of productionProgramming the Board Initialization Used interrupt lineUsed type of driver Driver versionSpcpcimemsize Powerdown and resetExample program for the board initialization SpcpciserialnoImportant note on channels selection Analog InputsChannel Selection Analog InputsSPCCHROUTE0 Channel reroutingRerouting information for module SPCCHROUTE1Setting up the inputs Input rangesInput offset Register Value Direction Description Offset rangeAutomatical adjustment of the offset settings Overrange bitInput termination Spcadjautoadj Adjall Spcadjsave ADJUSER0Memory, Pre- and Posttrigger Standard acquisition modesProgramming Pretrigger = memsize posttriggerMaximum posttrigger in MSamples Starting without interrupt classic modeCommand register Minimum memsize and posttrigger in samplesStarting with interrupt driven mode Standard acquisition modes ProgrammingStatus register 201100 Enables the fast 8 bit mode Normal modeFast 8 bit mode Data organizationValue ’start’ as a 32 bit integer value Standard modeReading out the data with SpcGetData Value ’len’ as a 32 bit integer valueProgramming Background Fifo Read Fifo ModeGeneral Information Speed LimitationsTheoretical maximum sample rate PCI Bus Throughput Programming Fifo ModeSoftware Buffers 60040 Read out the number of available Fifo buffersAnalog acquisition or generation boards Fifo Mode ProgrammingBuffer processing Digital I/O 701x or 702x or pattern generator boardsSpcfifostart Example Fifo acquisition modeFifo acquisition example SpcfifowaitSample format Clock generation Internally generated sample rateStandard internal sample rate External reference clock Using plain quartz without PLLMaximum internal sample rate in MS/s normal mode Clock generationMinimum external sample rate External clockingDirect external clock Maximum external samplerate in MS/sExternal clock with divider CHANNEL0 CHANNEL1 CHANNEL2 CHANNEL3Fifo Software trigger Trigger modes and appendant registersGeneral Description External TTL triggerTrigger modes and appendant registers Example on how to set up the board for positive TTL triggerEdge triggers Positive TTL triggerTTL pulsewidth trigger for long High pulses Pulsewidth triggersPositive and negative TTL trigger TTL pulsewidth trigger for short High pulsesSpctriggermode Tmttlhighlp TTL pulsewidth trigger for long LOW pulsesTTL pulsewidth trigger for short LOW pulses SpcpulsewidthSpctriggermode Tmchannel Channel TriggerOverview of the channel trigger registers TmchxoffSPCTRIGGERMODE0 Tmchxoff TriggerlevelSpctriggermode Tmchor SPCTRIGGERMODE2 TmchxoffSPCHIGHLEVEL0 Reading out the number of possible trigger levelsSPCTRIGGERMODE0 Tmchxpos Input ranges Triggerlevel ±50 mV ±100 mV ±200 mV ±500 mVChannel trigger on negative edge Detailed description of the channel trigger modesChannel trigger on positive edge Channel trigger on positive and negative edgeChannel pulsewidth trigger for long positive pulses Channel pulsewidth trigger for long negative pulsesChannel pulsewidth trigger for short positive pulses Channel pulsewidth trigger for short negative pulsesTmchxposgsp Channel steepness trigger for flat positive pulses Channel steepness trigger for flat negative pulsesChannel steepness trigger for steep positive pulses Channel steepness trigger for steep negative pulsesChannel window trigger for entering signals Channel window trigger for leaving signalsChannel window trigger for long inner signals Channel window trigger for long outer signalsChannel window trigger for short inner signals Channel window trigger for short outer signalsOption Multiple Recording Standard ModeWhen using Multiple Recording pretrigger is not available Recording modesSpcmemsize Resulting start delaysTrigger modesOption Multiple Recording SpctriggermodeOption Gated Sampling General information and trigger delayOption Gated Sampling SpcgateEnd of gate alignement Alignement samples per channelOption Gated SamplingTrigger modes Number of samples on gate signalAllowed trigger modes External TTL edge triggerChannel trigger Example programExample program Option Gated Sampling Spctriggermode TmttlposTimestamp modes StartReset modeOption Timestamp LimitsTimestamp Status RefClock mode optionalFunctions for accessing the data Reading out timestamp dataData format SpcGetData nr, ch, start, len, dataSpctimestampcount Standard acquisition mode Example programsAcquisition with Multiple Recording Analog Outputs Option Extra I/ODigital I/Os Channel directionProgramming example Programming example Option Extra I/OSample format Bit Standard Mode Digital Inputs enabledOption Digital inputs SpcreaddigitalSynchronization with option cascading Synchronization OptionDifferent synchronization options Synchronization with option starhubLet the master calculate it’s clocking Setup order for the different synchronization optionsSet up the board parameters Write Data to on-board memory output boards onlyExample of board #2 set as trigger master Example for data writingDefine the boards for trigger master 4a Define synchronization or triggerDefine the remaining boards as clock slaves Define the board for clock masterExample board number 0 is clock master Arm the boards for synchronizationRead data from the on-board memory acquisition boards only Start all of the trigger master boardsWait for the end of the measurement Restarting the board for another synchronized runSpcsyncmasterfifo Example of Fifo buffer allocation2a Write first data for output boards SpcsyncslavefifoAdditions for synchronizing different boards General informationCalculating the clock dividers 20xx 30xx 31xx 40xx 45xx 60xx 61xx 70xx 72xx40 MS/s Setting up the clock dividerBoard type 3122 3120 Board type 3025 3131Delay in Fifo mode Resulting delays using different boards or speedsDelay in standard non Fifo modes Additions for equal boards with different sample ratesError name Value hex Value dec Error description Error CodesError Codes AppendixPin assignment of the multipin connector Extra I/O with external connectorOption -XMFOption Digital inputs Pin assignment of the multipin cable
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