SMSC COM20020 manual NON-MULTIPLEXED BUS, 68XX-LIKE Control Signals Write Cycle

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A0-A2

 

VALID

 

 

 

 

 

t1

 

t2

nCS

 

 

 

 

 

 

t4

DIR

t3

 

 

 

t5

t6

t7

nDS

 

 

 

 

Note 2

 

 

 

 

 

t8

t6**

 

 

 

t9

D0-D7

 

VALID DATA

 

 

Parameter

min

max

units

t1

Address Setup to nDS Active

15

 

nS

t2

Address Hold from nDS Inactive

10

 

nS

t3

nCS Setup to nDS Active

5

 

nS

t4

nCS Hold from nDS Inactive

0

 

nS

t5

DIR Setup to nDS Active

10

 

nS

t6

Cycle Time (nDS Low to Next Time Low)**

4T*

 

nS

t7

DIR Hold from nDS Inactive

10

 

nS

t8

Valid Data Setup to nDS High

30**

 

nS

t9

Data Hold from nDS High

10

 

nS

 

 

 

 

 

*T is the Arbitration Clock Period.

T is identical to XTAL1 if SLOW ARB = 0, T is twice XTAL1 period if SLOW ARB = 1

**nCS may become active after control becomes active, but the data setup time will now be 30 nS measured from the later of nCS falling or Valid Data available.

Note 1:

Note 2:

The Microcontroller typically accesses the COM20020 on every other cycle. Therefore, the cycle time specified in the microcontroller's datasheet should be doubled when considering back-to-back COM20020 cycles.

Any cycle occurring after a write to the Address Pointer Low Register requires a minimum of 4T from the trailing edge of nDS to the leading edge of the next nDS.

FIGURE 13A - NON-MULTIPLEXED BUS, 68XX-LIKE CONTROL SIGNALS; WRITE CYCLE

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Contents General Description FeaturesTable of Contents PIN Configuration A1,A2/ALE Description of PIN FunctionsMiscellaneous DIP PIN Plcc PIN Name Symbol DescriptionTransmission Media Interface Instead, it must be connected to XTAL1 with COM20020 Operation Protocol Description Network ReconfigurationNetwork Protocol Data RatesResponse Time Extended Timeout FunctionBroadcast Messages Idle Time Reconfiguration TimeLine Protocol Invitations To TransmitNegative Acknowledgements Data PacketsAcknowledgements System Description MULTIPLEXED, 8051-LIKE BUS Interface with RS-485 Interface Figure C Traditional Hybrid Interface Backplane ConfigurationCOM20020 Network Using RS-485 Differential Transceivers Programmable Txen Polarity Differential Driver ConfigurationInternal Block Diagram Attenuation Functional DescriptionNominal Cable Type Impedance AT 5MHZRead Register Summary Write Interrupt Mask Register IMR Internal RegistersData Register Tentative ID RegisterCommand Register Diagnostic Status RegisterNext ID Register Status RegisterConfiguration Register Setup Register BIT BIT Name Symbol Description Dupid BIT BIT Name Symbol DescriptionData Command Description Address Pointer Low Register Address Pointer High RegisterReset Configuration RegisterCKP3 CKP2 CKP1 Sequential Access Operation Access Speed Sequential Access MemoryInternal RAM Software InterfaceTransmit Sequence Selecting RAM Page SizeRAM Buffer Packet Configuration Page Receive Sequence Transmit Command Chaining Command ChainingReceive Command Chaining Internal Reset Logic Reset DetailsInitialization Sequence Improved DiagnosticsAbnormal Results Normal ResultsOscillator DC Electrical Characteristics Maximum Guaranteed RatingsParameter Symbol MIN TYP MAX Unit Comment Operational DescriptionXTAL1, XTAL2 Input Capacitance Multiplexed BUS, 68XX-LIKE Control Signals Read Cycle Timing DiagramsMultiplexed BUS, 80XX-LIKE Control Signals Read Cycle Multiplexed BUS, 68XX-LIKE Control Signals Write Cycle Multiplexed BUS, 80XX-LIKE Control Signals Write Cycle NON-MULTIPLEXED BUS, 80XX-LIKE Control Signals Read Cycle NON-MULTIPLEXED BUS, 68XX-LIKE Control Signals Read Cycle NON-MULTIPLEXED BUS, 80XX-LIKE Control Signals Write Cycle NON-MULTIPLEXED BUS, 68XX-LIKE Control Signals Write Cycle These signals are to and from the hybrid Normal Mode Transmit or Receive TimingNTXEN NPULSE1 TTL Input Timing on XTAL1 PIN 28-PIN Plcc Package Dimensions 24-PIN DIP Package Dimensions SECTION/FIGURE/ENTRY Correction Revised DateStandard Microsystems Corp