SMSC COM20020 manual XTAL1, XTAL2

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PARAMETER	SYMBOL	MIN	TYP	MAX	UNIT	COMMENT

Low Output Voltage 1	VOL1			0.4	V	ISINK=4mA
(nPULSE1 in Normal
Mode, nPULSE2,
nTXEN)
High Output Voltage 1	VOH1	2.4			V	ISOURCE=-2mA
(nPULSE1 in Normal
Mode, nPULSE2,
nTXEN)

Low Output Voltage 2	VOL2			0.4	V	ISINK=16mA
(D0-D7)
High Output Voltage 2	VOH2	2.4			V	ISOURCE=-12mA
(D0-D7)

Low Output Voltage 3	VOL3			0.8	V	ISINK=24mA
(nINTR)
High Output Voltage 3	VOH3	2.4			V	ISOURCE=-10mA
(nINTR)

Low Output Voltage 4	VOL4			0.5	V	ISINK=48mA
(nPULSE1 in Backplane						Open Drain Driver
Mode - Open Drain)

Dynamic VDD Supply	IDD1			50	mA
Current 1

Input Pull-up Current	IP		80	200	μA	VIN=0.0V
(nPULSE1 in Backplane
Mode, A1, AD0-AD2,
D3-D7)
Input Leakage Current	IL			±10	μ	VSS < VIN < VDD
(All inputs except A1,					A
(All inputs except A1,
AD0-AD2, D3-D7,
XTAL1, XTAL2)

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Contents Features General DescriptionTable of Contents PIN Configuration Description of PIN Functions A1,A2/ALEMiscellaneous DIP PIN Plcc PIN Name Symbol DescriptionTransmission Media Interface Instead, it must be connected to XTAL1 with COM20020 Operation Network Reconfiguration Protocol DescriptionNetwork Protocol Data RatesResponse Time Extended Timeout FunctionBroadcast Messages Reconfiguration Time Idle TimeLine Protocol Invitations To TransmitNegative Acknowledgements Data PacketsAcknowledgements System Description MULTIPLEXED, 8051-LIKE BUS Interface with RS-485 Interface Figure C Backplane Configuration Traditional Hybrid InterfaceCOM20020 Network Using RS-485 Differential Transceivers Differential Driver Configuration Programmable Txen PolarityInternal Block Diagram Functional Description AttenuationNominal Cable Type Impedance AT 5MHZRead Register Summary Write Internal Registers Interrupt Mask Register IMRData Register Tentative ID RegisterDiagnostic Status Register Command RegisterNext ID Register Status RegisterConfiguration Register Setup Register BIT BIT Name Symbol Description BIT BIT Name Symbol Description DupidData Command Description Address Pointer High Register Address Pointer Low RegisterConfiguration Register ResetCKP3 CKP2 CKP1 Sequential Access Operation Sequential Access Memory Access SpeedInternal RAM Software InterfaceSelecting RAM Page Size Transmit SequenceRAM Buffer Packet Configuration Page Receive Sequence Command Chaining Transmit Command ChainingReceive Command Chaining Reset Details Internal Reset LogicImproved Diagnostics Initialization SequenceNormal Results Abnormal ResultsOscillator Maximum Guaranteed Ratings DC Electrical CharacteristicsParameter Symbol MIN TYP MAX Unit Comment Operational DescriptionXTAL1, XTAL2 Input Capacitance Timing Diagrams Multiplexed BUS, 68XX-LIKE Control Signals Read CycleMultiplexed BUS, 80XX-LIKE Control Signals Read Cycle Multiplexed BUS, 68XX-LIKE Control Signals Write Cycle Multiplexed BUS, 80XX-LIKE Control Signals Write Cycle NON-MULTIPLEXED BUS, 80XX-LIKE Control Signals Read Cycle NON-MULTIPLEXED BUS, 68XX-LIKE Control Signals Read Cycle NON-MULTIPLEXED BUS, 80XX-LIKE Control Signals Write Cycle NON-MULTIPLEXED BUS, 68XX-LIKE Control Signals Write Cycle Normal Mode Transmit or Receive Timing These signals are to and from the hybridNTXEN NPULSE1 TTL Input Timing on XTAL1 PIN 28-PIN Plcc Package Dimensions 24-PIN DIP Package Dimensions Date SECTION/FIGURE/ENTRY Correction RevisedStandard Microsystems Corp