SMSC COM20020 manual Functional Description, Attenuation, Nominal, Cable Type Impedance AT 5MHZ

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Table 1 - Typical Media

 

 

ATTENUATION

 

NOMINAL

PER 1000 FT.

CABLE TYPE

IMPEDANCE

AT 5MHZ

 

 

 

RG-62 Belden #86262

93Ω

5.5dB

 

 

 

RG-59/U Belden #89108

75Ω

7.0dB

 

 

 

RG-11/U Belden #89108

75Ω

5.5dB

 

 

 

IBM Type 1* Belden #89688

150Ω

7.0dB

 

 

 

IBM Type 3* Telephone Twisted

 

 

Pair Belden #1155A

100Ω

17.9dB

 

 

 

COMCODE 26 AWG Twisted

 

 

Pair Part #105-064-703

105Ω

16.0dB

 

 

 

*Non-plenum-rated cables of this type are also available.

Note: For more detailed information on Cabling options including RS-485, transformer-coupled RS- 485 and Fiber Optic interfaces, please refer to TN7-5 - Cabling Guidelines for the COM20020 ULANC, available from Standard Microsystems Corporation.

FUNCTIONAL DESCRIPTION

MICROSEQUENCER

The COM20020 contains an internal microsequencer which performs all of the control operations necessary to carry out the ARCNET protocol. It consists of a clock generator, a 544 x 8 ROM, a program counter, two instruction registers, an instruction decoder, a no-op generator, jump logic, and reconfiguration logic.

The COM20020 derives a 5MHz and a 2.5MHz clock from the external crystal. These clocks provide the rate at which the instructions are executed within the COM20020. The 5MHz clock is the rate at which the program counter operates, while the 2.5MHz clock is the rate at which the instructions are executed. The microprogram is stored in the ROM and the

instructions are fetched and then placed into the instruction registers. One register holds the opcode, while the other holds the immediate data. Once the instruction is fetched, it is decoded by the internal instruction decoder, at which point the COM20020 proceeds to execute the instruction. When a no-op instruction is encountered, the microsequencer enters a timed loop and the program counter is temporarily stopped until the loop is complete. When a jump instruction is encountered, the program counter is loaded with the jump address from the ROM. The COM20020 contains an internal reconfiguration timer which interrupts the microsequencer if it has timed out. At this point the program counter is cleared and the MYRECON bit of the Diagnostic Status Register is set.

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Contents General Description FeaturesTable of Contents PIN Configuration A1,A2/ALE Description of PIN FunctionsTransmission Media Interface DIP PIN Plcc PIN Name Symbol DescriptionMiscellaneous Instead, it must be connected to XTAL1 with COM20020 Operation Data Rates Network ReconfigurationProtocol Description Network ProtocolBroadcast Messages Extended Timeout FunctionResponse Time Invitations To Transmit Reconfiguration TimeIdle Time Line ProtocolAcknowledgements Data PacketsNegative Acknowledgements System Description MULTIPLEXED, 8051-LIKE BUS Interface with RS-485 Interface Figure C Traditional Hybrid Interface Backplane ConfigurationCOM20020 Network Using RS-485 Differential Transceivers Programmable Txen Polarity Differential Driver ConfigurationInternal Block Diagram Cable Type Impedance AT 5MHZ Functional DescriptionAttenuation NominalRead Register Summary Write Tentative ID Register Internal RegistersInterrupt Mask Register IMR Data RegisterStatus Register Diagnostic Status RegisterCommand Register Next ID RegisterConfiguration Register Setup Register BIT BIT Name Symbol Description Dupid BIT BIT Name Symbol DescriptionData Command Description Address Pointer Low Register Address Pointer High RegisterReset Configuration RegisterCKP3 CKP2 CKP1 Sequential Access Operation Software Interface Sequential Access MemoryAccess Speed Internal RAMTransmit Sequence Selecting RAM Page SizeRAM Buffer Packet Configuration Page Receive Sequence Transmit Command Chaining Command ChainingReceive Command Chaining Internal Reset Logic Reset DetailsInitialization Sequence Improved DiagnosticsAbnormal Results Normal ResultsOscillator Operational Description Maximum Guaranteed RatingsDC Electrical Characteristics Parameter Symbol MIN TYP MAX Unit CommentXTAL1, XTAL2 Input Capacitance Multiplexed BUS, 68XX-LIKE Control Signals Read Cycle Timing DiagramsMultiplexed BUS, 80XX-LIKE Control Signals Read Cycle Multiplexed BUS, 68XX-LIKE Control Signals Write Cycle Multiplexed BUS, 80XX-LIKE Control Signals Write Cycle NON-MULTIPLEXED BUS, 80XX-LIKE Control Signals Read Cycle NON-MULTIPLEXED BUS, 68XX-LIKE Control Signals Read Cycle NON-MULTIPLEXED BUS, 80XX-LIKE Control Signals Write Cycle NON-MULTIPLEXED BUS, 68XX-LIKE Control Signals Write Cycle These signals are to and from the hybrid Normal Mode Transmit or Receive TimingNTXEN NPULSE1 TTL Input Timing on XTAL1 PIN 28-PIN Plcc Package Dimensions 24-PIN DIP Package Dimensions SECTION/FIGURE/ENTRY Correction Revised DateStandard Microsystems Corp