Intel manual MPCMM0002 CMM-Rear Connections

Page 41

MPCMM0002 CMM—Rear Connections

BD_SEL# bit is set low indicating the CMM is properly inserted.

OSL bit is set high indicating the OS is loading.

If one CMM detects an internal failure that cannot be corrected through software, it will deassert its HLY# signal. If the faulty CMM is the active CMM, the standby CMM becomes the active CMM as soon as it sees the HLYI# signal rise. HLY# de-asserts for the following reasons: board removal, power goes unstable, watchdog timer fires, board reset, OSL bit is de-asserted by firmware, or software sets fail bit.

Similarly, if one CMM is removed, its PRES# signal on the backplane will no longer be held low and the other CMM will see a high PRESI# signal. Hardware on that CMM quickly negotiates for it to become the active CMM.

In an active-standby mode, a communications path between the two CMMs over both IPMB and Ethernet is needed for full synchronization.

Intel NetStructure® MPCMM0002 Chassis Management Module

 

Hardware TPS

July 2007

42

Order Number: 309247-004US

Image 41
Contents Intel NetStructure MPCMM0002 Chassis Management Module Hardware Technical Product SpecificationOrder Number 309247-004US Contents 17.4 Tables FiguresOrder Number 309247-004US Date Revision Description Revision HistoryDocument Organization Acronym/Term Meaning Acronyms and TermsAcronyms and Terms Introduction Architecture SpecificationUser Documentation Product DefinitionMPCMM0002 CMM-Introduction Getting Started Installing the CMMQuick Start Module Components Block DiagramCMM Top View Layout Intel 80321 Processor Processor Features Sheet 1Pbga Processor Features Sheet 2Serial Port UARTs MemoryEthernet Fpga Features Watchdog TimerFpga Redundancy and Hot Swap CpldHot Swap Controller 10 ADM1026 ControllerRide-Through Support Ipmb Isolation LogicIpmb Dual Star Isolation Dual Bus Ipmb Isolation RequirementsFpga Mechanical Information DimensionsCMM Backing Plate Dimensions Front Panel Hardware CMM Side View DimensionsMPCMM0002 CMM Rear Connectors Rear Connector PlacementCoplanar Mating Connectors Vertical Mating ConnectorsDC Power Input CMM PowerBackplane Considerations Ipmb RoutingVoltage Usage CDM PowerVoltage Max Where Used Monitored By Current Filter Tray Power SwitchChassis Component Element Ethernet RoutingChassis Elements Directly Driven by CMM Hardware Rear Connections CMM Connector PinoutsCMM Power Connector Pin Signal Purpose Pin Length Power Connector PinoutsPower Connector Receptacle Pin Placement Sheet 1 Power Connector Pinouts MatrixPin Staging Order Mating Tail Pin Code LengthRear Connections-MPCMM0002 CMM CMM Data Connector CMM Data ConnectorSignal Name Count Type Description Pin Name From Table Data Connector Pinouts Sheet 1Data Connector Pinouts Matrix Sheet 1 Data Connector Pinouts Sheet 2Data Connector Pinouts Matrix Sheet 2 Order Mating Length Tail Length Pin Code Data Connector Pinouts Matrix Sheet 3CMM Redundancy Guide PostMPCMM0002 CMM-Rear Connections CDM Overview Chassis Data Modules CDMsCDM Management CDM Health LED StatesCDM Redundancy CDM PowerSerial Port Pinouts Front PanelPin Signal Description Serial Port RJ-45 ConnectorEthernet Port Pinouts Ethernet Port PinoutsLED Color Status Description Telco Alarm ConnectorEthernet Port LED States Pin Description Cascading the Telco Alarm ConnectorsTelco Alarm Pinout MxxReset Input Ganged Telco Alarm Cable Pinouts with Cabling Alarm Quiet SwitchLEDs Alarm LEDsLED Symbol Status Description Hot Swap LED Health LEDUser-Definable LEDs CMM Health LED StatesChassis Ground and Logic Ground Grounding ConsiderationsESD Discharge Protection Processor Heat Sink ThermalsModule Orientation Module Airflow PathSide-to-Side Air Flow Board Resistance Curve Airflow RequirementsTypical Airflow and Cooling Requirements Category CMMsMinimum Air Flow Air Temp Rise Thermal SensorsAirflow Guidelines Feature Summary Management Module Specifications12.3 Environmental Characteristics Dimensions and WeightDimensions and Weight Environmental CharacteristicsAssumptions and Notes Agency CertificationsReliability Estimate Data Reliability Measure Value UnitsHigh Level Design Guidelines for Third Party Chassis VendorsIpmb Buses O Signals of the CMMPhysical Bus Number Mapping Ipmb Signal Physical Bus NumberRadial Bus Topologya Dedicated I/O Pins Gpio PinsInterfacing FRUs to the CMM Example ConfigurationsFRUs Based on the ADM1026 Intelligent FRUsNon-Intelligent FRUs with I2C* Support FRU Data Storage for Non-Intelligent Devices Two-Wire Serial Interface BasedNon-Intelligent FRUs without I2C Support Controllers and I/O Ports for Non-Intelligent Devices Temperature Sensors Fronted by the CMMRelated Documents Related DocumentsReturning a Defective Product RMA Warranty InformationFor Asia and Pacific Apac For the AmericasFor Europe, Middle East, and Africa Emea Warranty Information-MPCMM0002 CMM Customer Support Technical Support and Return for Service AssistanceCustomer Support Sales AssistanceCertifications Material Declaration Data SheetMaterial Declaration Data Sheet North America FCC Class a Agency InformationTaiwan Class a Warning Statement Safety Instructions English and French-translated belowEnglish FrenchJapan Vcci Class a Korean Class a Australia, New Zealand Safety Warnings Mesures de Sécurité MPCMM0002 CMM-Safety Warnings Sicherheitshinweise MPCMM0002 CMM-Safety Warnings Norme di Sicurezza MPCMM0002 CMM-Safety Warnings Instrucciones de Seguridad MPCMM0002 CMM-Safety Warnings Chinese Safety Warning MPCMM0002 CMM-Safety Warnings Fpga Working page only. Do not distribute Working page only. Do not distribute Working page only. Do not distribute