Agilent Technologies 8166A, 8163A Error queue, Standard event status register Sesr, Bit Mnemonic

IEEE-Common Commands Instrument Setup and Status

command:	*CLS
syntax:	*CLS
description:	The CLear Status command *CLS clears the following:
	• Error queue
	• Standard event status register (SESR)
	• Status byte register (STB)
	After the *CLS command the instrument is left waiting for the next command. The instru-
	ment setting is unaltered by the command, although *OPC/*OPC? actions are cancelled.
parameters:	none
response:	none
example:	*CLS

command:

syntax:

description:

parameters:

response:

example:

*ESE

*ESE<wsp><value>

0 ≤ value ≤ 255

The standard Event Status Enable command (*ESE) sets bits in the Standard Event Status Enable Mask (SESEM) that enable the corresponding bits in the standard event status regis- ter (SESR).

The register is cleared:

•at power-on,

•by sending a value of zero.

The register is not changed by the *RST and *CLS commands.

The bit value for the register (a 16-bit signed integer value):

Bit		Mnemonic	Decimal Value
7	(MSB)	Power On	128
6		Not Used	0
5		Command Error	32
4		Execution Error	16
3		Device Dependent Error	8
2		Query Error	4
1		Not Used	0
0	(LSB)	Operation Complete	1

none

*ESE 21

Agilent 8163A/B, 8164A/B & 8166A/B Mainframes, Fifth Edition 57