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AMD 8151 specifications Data Sheet, System block diagram, Rev 3.03 - July, 1Overview

Models: 8151

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24888 Rev 3.03 - July 12, 2004

24888 Rev 3.03 - July 12, 2004

AMD-8151TMAGP Tunnel Data Sheet

Cover page

AMD-8151TMHyperTransportTM AGP3.0 Graphics Tunnel

Data Sheet

1Overview

The AMD-8151TMHyperTransportTM AGP3.0 Graphics Tunnel (referred to as the IC in this document) is a HyperTransport™ technology (referred to as link in this document) tunnel developed by AMD that provides an AGP 3.0 compliant (8x transfer rate) bridge.

1.1Device Features

•HyperTransport technology tunnel with side A and side B.

•Side A is 16 bits (input and output); side B is 8 bits.

•Either side may connect to the host or to a downstream HyperTransport technology compliant device.

•Each side supports HyperTransport technol- ogy-defined reduced bit widths: 8-bit, 4-bit, and 2-bit.

•Side A supports transfer rates of 1600, 1200, 800, and 400 mega-transfers per second. Side B supports transfer rates of 800 and 400 mega-transfers per second.

•Maximum bandwidth is 6.4 gigabytes per second across side A (half upstream and half downstream) and 1.6 gigabytes per second across side B.

•Independent transfer rate and bit width selection for each side.

•Link disconnect protocol supported.

•AGP 8x bridge.

•Compliance with AGP 3.0 specification sig- naling, supporting 4x and 8x transfer rates.

•Compliance with AGP 2.0 specification 1.5- volt signaling, supporting 1x, 2x, and 4x data-transfer modes.

•Supports up to 32 outstanding requests.

•31 x 31 millimeter, 564-ball BGA package.

•1.5 volt AGP signaling; some 3.3 volt IO; 1.2 volt link signaling; 1.8 volt core.

Host

HyperTransportTM

Link

16 bits upstream,

16 bits downstream

AMD-8151TMDevice
Side A	Side B
	tunnel
	AGP
	Bridge

HyperTransport

Link				Downstream
8 bits upstream,					Device
8 bits downstream
8 bits downstream

	AGP Graphics
	Controller

Figure 1: System block diagram.

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Image 1

AMD 8151 specifications Data Sheet, System block diagram, Rev 3.03 - July, 1Overview, 1.1Device Features

Contents

Figure 1 System block diagram Data Sheet1.1Device Features 24888 Rev 3.03 - July2004 Advanced Micro Devices, Inc 24888 Rev 3.03 - JulyTable of Contents AMD-8151TM AGP Tunnel Data Sheet List of FiguresFigure 1 System block diagram Configuration spaceList of Tables 3Signal Descriptions 3.1Terminology Case TemperatureAMD-8151BL C 24888 Rev 3.03 - July24888 Rev 3.03 - July 3.2Tunnel Link SignalsAMD-8151TM AGP Tunnel Data Sheet 3.3AGP Signals24888 Rev 3.03 - July 24888 Rev 3.03 - July AMD-8151TM AGP Tunnel Data Sheet3.5 Power and Ground 3.4 Test and Miscellaneous Signals3.5.1Power Plane Sequencing 24888 Rev 3.03 - July 4.2Reset And Initialization4Functional Operation 4.1Overview 4.3Clocking4.4Tunnel Links 24888 Rev 3.03 - July4.4.1Link PHY 4.5AGPAGP transaction 24888 Rev 3.03 - JulyLink transaction 4.5.2Various Behaviors5.1.1Configuration Space Figure 2 Configuration space24888 Rev 3.03 - July 5Registers 5.1Register Overview5.2AGP Device Configuration Registers Table 3 Configuration spacesTable 4 Memory mapped address spaces Table 5 Register attributesDevA AGP Device Status And Command RegisterBits DescriptionDevA 24888 Rev 3.03 - JulyBits DescriptionAGP Miscellaneous Control Register AMD-8151TM AGP Tunnel Data SheetDevA BitsAGP PHY Control Register 24888 Rev 3.03 - JulyDevA DescriptionDevA AGP PHY Skew Control RegisterBits DescriptionAGP Most Recent Request Register 24888 Rev 3.03 - JulyDevA Bits24888 Rev 3.03 - July AGP Command RegisterBits DescriptionBits AGP Control RegisterDescription AGP Aperture Size RegisterBits Link Command RegisterDescription GARTHI GART base address register high24888 Rev 3.03 - July Link Configuration And Control RegisterBits Description24888 Rev 3.03 - July Link Frequency Capability 0 Register 24888 Rev 3.03 - JulyDevA 0xCC BitsLink PHY Compensation Control Registers 24888 Rev 3.03 - JulyDevA 0xE8, E4, E0 BitsBits Description Clock Control RegisterAGP Bridge Status And Command Register 5.3AGP Bridge Configuration Registers24888 Rev 3.03 - July AGP Bridge Vendor And Device ID RegisterBits DevBDescription AGP Bridge Memory Base-LimitRegistersBits 24888 Rev 3.03 - JulyDescription BitsBits AMD-8151TM AGP Tunnel Data SheetDescription BitsTable 7 Operating ranges Table 6 Absolute maximum ratings24888 Rev 3.03 - July 6Electrical Data 6.1Absolute Ratings6.3DC Characteristics Table 8 Current and power consumption24888 Rev 3.03 - July Input low voltage Table 12 AC data for clocks 6.4AC Characteristics24888 Rev 3.03 - July 24888 Rev 3.03 - July AMD-8151TM AGP Tunnel Data SheetA PCLK to transmit strobe first strobe edge Figure 3 Ball designations AMD-8151TM AGP Tunnel Data Sheet24888 Rev 3.03 - July 7Ball DesignationsSignal name AMD-8151TM AGP Tunnel Data SheetSignal name Signal nameSignal AMD-8151TM AGP Tunnel Data SheetSignal SignalAMD-8151TM AGP Tunnel Data Sheet 8Package SpecificationFigure 4 Package mechanical drawing 24888 Rev 3.03 - July9Test 24888 Rev 3.03 - JulyMode TESTAMD-8151TM AGP Tunnel Data Sheet NAND tree 2 output signal is STRAPL424888 Rev 3.03 - July 10 Appendix 10.1 Revision History Revision 24888 Rev 3.03 - JulyRevision