AMD 8151 specifications AGP PHY Skew Control Register, DevA, Bits, Description

Models: 8151

1 45
Download 45 pages 54.77 Kb
Page 20
Image 20
AGP PHY Skew Control Register

24888 Rev 3.03 - July 12, 2004

AMD-8151TMAGP Tunnel Data Sheet

 

 

15:14

PCTL: AGP PHY P (rising edge) compensation control. Read-write. These two bits combine to

 

specify the PHY rising edge compensation value that is applied to AGP signals as follows:

 

PCTL

Description

 

 

00b

Apply PCOMP directly as the compensation value.

 

01b

Apply PDATA directly as the compensation value.

 

10b

Apply the sum of PCOMP and PDATA as the compensation value. If the sum exceeds

 

 

1Fh, then 1Fh is applied.

 

 

11b

Apply the difference of PCOMP minus PDATA as the compensation value. If the dif-

 

 

ference is less than 00h, then 00h is applied.

 

 

 

 

 

13:12

Reserved.

 

 

 

 

 

11

RW: read-write bit. Read-write. This controls no logic.

 

 

 

10:6

PDATA: AGP rising edge drive strength control. Read-write. This value is applied to the rising-

 

edge (P transistor) PHY compensation as described in PCTL.

 

 

 

 

 

5

Reserved.

 

 

 

 

4:0

PCOMP: AGP rising edge drive strength. Read only. This provides the calculated value of the ris-

 

ing-edge (P transistor) drive strength of the AGP signals. The default for this field varies. This field is

 

updated by the hardware approximately every 8 microseconds.

 

 

 

 

AGP PHY Skew Control Register

DevA:0x58

 

 

 

 

DSKEW and SSKEW are designed such that when they are both programmed to the same value, the AGP out- put strobes transition near the center of the data eye. To move the strobe to a later point in the data eye, the value of SSKEW is increased. To move the strobe to an earlier point in the data eye, DSKEW is increased. These values translate into skew approximately as follows:

For values 0h to 8h, the skew is about: [D, S]SKEW x 80 picoseconds.

For values 9h to Fh, the skew is about: 800 + ([D, S]SKEW - 8) x 400 picoseconds.

However, these values vary with process, temperature, and voltage. Note that the lower values provide fine res- olution and the upper values provide coarse resolution.

Default: 0000 0000h.

Attribute: Read-write.

Bits

Description

 

 

 

 

31:8

Reserved.

 

 

 

7:4

DSKEW: AGP data skew. Read-write. This specifies the alignment of the AGP data signal outputs,

 

A_AD[31:0], A_CBE_L[3:0], and A_DBI[H, L], relative internal clocks. 0h=The strobe transitions

 

earliest. Fh=The strobe transitions latest.

 

 

 

3:0

SSKEW: AGP strobe skew. Read-write. This specifies the alignment of the AGP strobe signal out-

 

puts, A_ADSTB[1:0], relative internal clocks. 0h=The strobe transitions earliest. Fh=The strobe tran-

 

sitions latest.

 

 

 

 

20

Page 20
Image 20
AMD 8151 specifications AGP PHY Skew Control Register, DevA, Bits, Description