Manuals / AMD / Home Audio / Speaker

AMD 8151 specifications Rev 3.03 - July, DevA, Bits, Description, AGP Capabilities Pointer

Models: 8151

1 45

Download 45 pages 54.77 Kb

Page 17

DevA:0x10

24888 Rev 3.03 - July 12, 2004	AMD-8151TMAGP Tunnel Data Sheet
AGP Device Graphic Virtual Memory Aperture Register	DevA:0x10

It is expected that the state of this register is copied into the host by software. This register controls no hard- ware in the IC.

Default: 0000 0000 0000 0008h		Attribute: See below.
Bits	Description

63:32	APBARHI. Read-write. Aperture base address register high. Note: bits[63:40] are required to be
	programmed low; setting any of these bits high results in undefined behavior. Note: if
	DevA:0x10[64BIT]=0, then these bits are read only, all zero.

31:22	APBARLO. Aperture base address register low. These bits are a combination of read-write and read-
	only zero, based on the state of DevA:0xB4[APSIZE]; see that register for details.

21:4	Reserved.

3Read only. This bit is fixed at its default value to indicate that this register points prefetchable space.

264BIT: 64-bit pointer. Read; write once. 1=DevA:0x10 is a 64-bit pointer. 0=DevA:0x10 is a 32-bit pointer; bits[63:32] are reserved.

1:0	Read only. These bits are fixed at their default value to indicate that this register points memory space.
AGP Device Subsystem ID and Subsystem Vendor ID Register			DevA:0x2C

Default: 0000 0000h		Attribute: Read; write once.
Bits	Description

31:16	Subsystem ID. This field controls no hardware.

15:0	Subsystem vendor ID. This field controls no hardware.

AGP Capabilities Pointer			DevA:0x34

Default: 0000 00A0h		Attribute: Read only.
Bits	Description

31:8	Reserved.

7:0	Capabilities pointer. Specifies the offset in DevA:0 address space for the AGP capabilities block.

17

Image 17

AMD 8151 specifications Rev 3.03 - July, DevA, Bits, Description, AGP Capabilities Pointer

Contents

Figure 1 System block diagram Data Sheet1.1Device Features 24888 Rev 3.03 - July2004 Advanced Micro Devices, Inc 24888 Rev 3.03 - JulyTable of Contents AMD-8151TM AGP Tunnel Data Sheet List of FiguresFigure 1 System block diagram Configuration spaceList of Tables AMD-8151BL C 3Signal Descriptions 3.1Terminology24888 Rev 3.03 - July 2Ordering Information24888 Rev 3.03 - July 3.2Tunnel Link Signals24888 Rev 3.03 - July 3.3AGP SignalsAMD-8151TM AGP Tunnel Data Sheet 24888 Rev 3.03 - July AMD-8151TM AGP Tunnel Data Sheet3.5.1Power Plane Sequencing 3.4 Test and Miscellaneous Signals3.5 Power and Ground 24888 Rev 3.03 - July 4.2Reset And Initialization4Functional Operation 4.1Overview 4.3Clocking4.4Tunnel Links 24888 Rev 3.03 - July4.4.1Link PHY 4.5AGPAGP transaction 24888 Rev 3.03 - JulyLink transaction 4.5.2Various Behaviors5.1.1Configuration Space Figure 2 Configuration space24888 Rev 3.03 - July 5Registers 5.1Register Overview5.2AGP Device Configuration Registers Table 3 Configuration spacesTable 4 Memory mapped address spaces Table 5 Register attributesDevA AGP Device Status And Command RegisterBits DescriptionDevA 24888 Rev 3.03 - JulyBits DescriptionAGP Miscellaneous Control Register AMD-8151TM AGP Tunnel Data SheetDevA BitsAGP PHY Control Register 24888 Rev 3.03 - JulyDevA DescriptionDevA AGP PHY Skew Control RegisterBits DescriptionAGP Most Recent Request Register 24888 Rev 3.03 - JulyDevA Bits24888 Rev 3.03 - July AGP Command RegisterBits DescriptionBits AGP Control RegisterDescription AGP Aperture Size RegisterBits Link Command RegisterDescription GARTHI GART base address register high24888 Rev 3.03 - July Link Configuration And Control RegisterBits Description24888 Rev 3.03 - July Link Frequency Capability 0 Register 24888 Rev 3.03 - JulyDevA 0xCC BitsLink PHY Compensation Control Registers 24888 Rev 3.03 - JulyDevA 0xE8, E4, E0 BitsBits Description Clock Control RegisterAGP Bridge Status And Command Register 5.3AGP Bridge Configuration Registers24888 Rev 3.03 - July AGP Bridge Vendor And Device ID RegisterBits DevBDescription AGP Bridge Memory Base-LimitRegistersBits 24888 Rev 3.03 - JulyDescription BitsBits AMD-8151TM AGP Tunnel Data SheetDescription BitsTable 7 Operating ranges Table 6 Absolute maximum ratings24888 Rev 3.03 - July 6Electrical Data 6.1Absolute Ratings24888 Rev 3.03 - July Table 8 Current and power consumption6.3DC Characteristics Input low voltage 24888 Rev 3.03 - July 6.4AC CharacteristicsTable 12 AC data for clocks A PCLK to transmit strobe first strobe edge AMD-8151TM AGP Tunnel Data Sheet24888 Rev 3.03 - July Figure 3 Ball designations AMD-8151TM AGP Tunnel Data Sheet24888 Rev 3.03 - July 7Ball DesignationsSignal name AMD-8151TM AGP Tunnel Data SheetSignal name Signal nameSignal AMD-8151TM AGP Tunnel Data SheetSignal SignalAMD-8151TM AGP Tunnel Data Sheet 8Package SpecificationFigure 4 Package mechanical drawing 24888 Rev 3.03 - July9Test 24888 Rev 3.03 - JulyMode TEST24888 Rev 3.03 - July NAND tree 2 output signal is STRAPL4AMD-8151TM AGP Tunnel Data Sheet Revision 24888 Rev 3.03 - July10 Appendix 10.1 Revision History Revision