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AMD 8151 Rev 3.03 - July, 5.3AGP Bridge Configuration Registers, DevB, Bits, Description

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5.3AGP Bridge Configuration Registers

24888 Rev 3.03 - July 12, 2004

AMD-8151TMAGP Tunnel Data Sheet

5.3AGP Bridge Configuration Registers

These registers are located in PCI configuration space, in the second device (device B), function 0. See section 5.1.2 for a description of the register naming convention.

AGP Bridge Vendor And Device ID Register		DevB:0x00
Default: 7455 1022h		Attribute: See below.
Bits	Description

31:16	AGP bridge device ID. Bits[31:20] are read only; bits[19:16] are write-once. When the LSBs are left
	at the default value, some operating systems may load a generic graphics driver. System BIOS should
	program the LSBs to 6h in order to circumvent the loading of such a driver.

15:0	Vendor ID. Read only.

AGP Bridge Status And Command Register		DevB:0x04

Default: 0220 0000h		Attribute: See below.
Bits	Description

31:9	Read only. These bits are fixed in their default state.

8	SERREN: SERR# enable. Read-write. This bit controls no hardware.

7:3	Special cycle enable. Read only. This bit is hardwired low.

2	MASEN: PCI master enable. Read-write. 1=Enables the AGP bus master to initiate PCI cycles to
	the host.

1	MEMEN: memory enable. Read-write. 1=Enables access to the AGP bus memory space.

0	IOEN: IO enable. Read-write. 1=Enables access to the AGP bus IO space.

AGP Bridge Revision and Class Code Register		DevB:0x08

Default: 0604 00??h		Attribute: Read only.
Bits	Description

31:8	CLASSCODE.

7:0	REVISION.

AGP Bridge BIST-Header-Latency-Cache Register		DevB:0x0C

Default: 0001 0000h		Attribute: See below.
Bits	Description

31:24	BIST. Read only. These bits fixed at their default values.

23:16	HEADER. Read only. These bits fixed at their default values.

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AMD 8151 Rev 3.03 - July, 5.3AGP Bridge Configuration Registers, AGP Bridge Vendor And Device ID Register, DevB, Bits

Contents

1.1Device Features Data SheetFigure 1 System block diagram 24888 Rev 3.03 - July24888 Rev 3.03 - July 2004 Advanced Micro Devices, IncTable of Contents Figure 1 System block diagram List of FiguresAMD-8151TM AGP Tunnel Data Sheet Configuration spaceList of Tables AMD-8151BL C Case Temperature3Signal Descriptions 3.1Terminology 24888 Rev 3.03 - July3.2Tunnel Link Signals 24888 Rev 3.03 - July3.3AGP Signals AMD-8151TM AGP Tunnel Data Sheet24888 Rev 3.03 - July AMD-8151TM AGP Tunnel Data Sheet 24888 Rev 3.03 - July3.4 Test and Miscellaneous Signals 3.5 Power and Ground3.5.1Power Plane Sequencing 4Functional Operation 4.1Overview 4.2Reset And Initialization24888 Rev 3.03 - July 4.3Clocking4.4.1Link PHY 24888 Rev 3.03 - July4.4Tunnel Links 4.5AGPLink transaction 24888 Rev 3.03 - JulyAGP transaction 4.5.2Various Behaviors24888 Rev 3.03 - July Figure 2 Configuration space5.1.1Configuration Space 5Registers 5.1Register OverviewTable 4 Memory mapped address spaces Table 3 Configuration spaces5.2AGP Device Configuration Registers Table 5 Register attributesBits AGP Device Status And Command RegisterDevA DescriptionBits 24888 Rev 3.03 - JulyDevA DescriptionDevA AMD-8151TM AGP Tunnel Data SheetAGP Miscellaneous Control Register BitsDevA 24888 Rev 3.03 - JulyAGP PHY Control Register DescriptionBits AGP PHY Skew Control RegisterDevA DescriptionDevA 24888 Rev 3.03 - JulyAGP Most Recent Request Register BitsBits AGP Command Register24888 Rev 3.03 - July DescriptionDescription AGP Control RegisterBits AGP Aperture Size RegisterDescription Link Command RegisterBits GARTHI GART base address register highBits Link Configuration And Control Register24888 Rev 3.03 - July Description24888 Rev 3.03 - July DevA 0xCC 24888 Rev 3.03 - JulyLink Frequency Capability 0 Register BitsDevA 0xE8, E4, E0 24888 Rev 3.03 - JulyLink PHY Compensation Control Registers BitsClock Control Register Bits Description24888 Rev 3.03 - July 5.3AGP Bridge Configuration RegistersAGP Bridge Status And Command Register AGP Bridge Vendor And Device ID RegisterDescription DevBBits AGP Bridge Memory Base-LimitRegistersDescription 24888 Rev 3.03 - JulyBits BitsDescription AMD-8151TM AGP Tunnel Data SheetBits Bits24888 Rev 3.03 - July Table 6 Absolute maximum ratingsTable 7 Operating ranges 6Electrical Data 6.1Absolute RatingsTable 8 Current and power consumption 6.3DC Characteristics24888 Rev 3.03 - July Input low voltage 6.4AC Characteristics Table 12 AC data for clocks24888 Rev 3.03 - July AMD-8151TM AGP Tunnel Data Sheet 24888 Rev 3.03 - JulyA PCLK to transmit strobe first strobe edge 24888 Rev 3.03 - July AMD-8151TM AGP Tunnel Data SheetFigure 3 Ball designations 7Ball DesignationsSignal name AMD-8151TM AGP Tunnel Data SheetSignal name Signal nameSignal AMD-8151TM AGP Tunnel Data SheetSignal SignalFigure 4 Package mechanical drawing 8Package SpecificationAMD-8151TM AGP Tunnel Data Sheet 24888 Rev 3.03 - JulyMode 24888 Rev 3.03 - July9Test TESTNAND tree 2 output signal is STRAPL4 AMD-8151TM AGP Tunnel Data Sheet24888 Rev 3.03 - July 24888 Rev 3.03 - July 10 Appendix 10.1 Revision History RevisionRevision