24888 Rev 3.03 - July 12, 2004

AMD-8151TMAGP Tunnel Data Sheet

4FWSUP: fast write support flag. 0=Fast writes are not supported. 1=Fast writes are supported. The state of this bit is controlled by DevA:0x40[FWDIS].

3AGP3MD: AGP 3.0 signaling mode detected. 1=The IC detected connection to an AGP 3.0-capable master and is programmed for AGP 3.0 signaling. 0=The IC detected connection to an AGP 2.0 or earlier capable master or is not programmed for 1.5-volt, AGP 2.0 signaling. If DevA:0x40[8XDIS]=0 and the pin A_GC8XDET#=0, then this bit is high. Otherwise, it is low.

2:0

RATE: data rate. When AGP3MD=1, then this field defaults to 011b to indicate support for 4x and

 

8x data rates. When AGP3MD=0, this field defaults to 111b to indicate support for 4x, 2x, and 1x data

 

rates.

 

 

 

AGP Command Register

DevA:0xA8

 

 

Default: 0000 0000h

Attribute: Read-write.

Bits

Description

 

 

 

 

31:13

Reserved.

 

 

 

12:10

PCALCYC: periodic calibration cycle. Specifies the period between calibration cycles as follows:

 

000b=4 milliseconds; 001b=16 milliseconds; 010=64 milliseconds; 011b=256 milliseconds; all other

 

values are reserved. When DevA:0xA4[AGP3MD]=1, calibration cycles are as specified in the AGP

 

3.0 specification. When DevA:0xA4[AGP3MD]=0, calibration cycles consist of (1) the internal

 

calibration logic requests the bus; (2) once granted, the calibration values are update in less than 6

 

A_PCLK cycles while the AGP bus is in a quiescent state. Note: after changing this value, the IC may

 

not perform another calibration cycle until the internal counter rolls over as much as 256

 

microseconds later; in order to avoid this, DevA:0xB0[CALDIS] should be set high before changing

 

PCALCYC and then DevA:0xB0[CALDIS] should be cleared afterward.

9SBA_EN: side band address enable. 1=SBA addressing is enabled. Note: when DevA:0xA4[AGP3MD]=1, SBA addressing is enabled and the state of this bit is ignored.

8AGPEN: AGP operation enable. 1=The IC accepts master-initiated AGP commands. 0=AGP commands are ignored.

7:6 Reserved.

5R4GEN: receive greater-than 4-gigabyte access enable. 1=The IC accepts AGP accesses to addresses greater than 4 gigabytes.

4FWEN: fast write enable. 1=Fast writes are enabled. When DevA:0xA4[FWSUP]=0, this bit is required to be programmed low; if, in this case, this bit is programmed high, then undefined behavior results.

3Reserved.

22

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AMD 8151 specifications Rates, AGP Command Register, Default 0000 0000h Attribute Read-write
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8151 specifications

The AMD 8151 is a notable member of AMD's family of chipsets, designed to complement the AMD K5 and K6 processors. Released in the late 1990s, this chipset was primarily targeted at performance-driven PCs. The AMD 8151 provided users with an array of features and technologies that enhanced the overall computing experience, making it a popular choice among system builders and enthusiasts at the time.

One of the standout features of the AMD 8151 is its support for a 64-bit data bus. This significant design choice allowed for faster data transfer rates and better communication between the CPU and other critical components, such as memory. The chipset was capable of supporting multiple memory configurations, including ECC (Error-Correcting Code) memory, which enhanced system reliability, particularly for servers and workstations.

In terms of connectivity, the AMD 8151 included several integrated controllers, such as the PCI controller, which facilitated connections to various peripherals and expansion cards. With its support for the PCI bus, users could take advantage of high-speed devices, such as graphics cards, sound cards, and network adapters, enhancing the overall functionality of their systems.

Another important characteristic of the AMD 8151 is its power management capabilities. The chipset featured advanced power management technologies, which allowed systems to use energy more efficiently. This not only helped reduce operational costs but also contributed to less heat production, extending the longevity of the components within the PC.

The AMD 8151 also offered robust support for a range of bus speeds, which provided flexibility for users looking to customize their systems. With a maximum bus speed of 66 MHz, it was well-suited for the processors of its time, ensuring compatibility and optimal performance.

Moreover, the AMD 8151 played a crucial role in the development of 3D graphics capabilities. It was designed to work seamlessly with AMD's 3D graphics technology, which allowed for improved visual performance in gaming and multimedia applications. This made it an appealing choice for users who prioritized graphics performance.

Overall, the AMD 8151 chipset embodied the technological advancements of its era, providing enhanced performance, flexibility, and reliability. It stood as a testament to AMD's commitment to innovation in the computing space, marking a significant chapter in the evolution of PC architecture.
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