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AMD 8151 Rev 3.03 - July, 9Test, A Typedet, Ldtstop#, STRAPL0, 9.1High Impedance Mode

Models: 8151

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24888 Rev 3.03 - July 12, 2004

AMD-8151TMAGP Tunnel Data Sheet

9Test

The IC includes the following test modes.

Mode	TEST	A_TYPEDET	LDTSTOP#	STRAPL0	Notes

Operational	0	X	X	X

High impedance	1	0	0	0

NAND tree	1	0	0	1

Table 17: Test modes.

9.1High Impedance Mode

In high-impedance mode, all the signals of the IC are placed into the high-impedance state.

9.2NAND Tree Mode

There are several NAND trees in the IC. Some of the inputs are differential (e.g., LR[B, A] pins); for these, the _P and _N pairs of signals are converted into a single signal that is part of the NAND tree, as shown in Signal_3 in the following diagram.

VDD		…
Signal_1
Signal_2
Signal_2		1
Signal_3_P	+	0
Signal_3_N	-	0
Signal_3_N	-
…
Signal_41
Output signal

NAND Tree Mode

to output signal

Figure 5: NAND tree.

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AMD 8151 specifications Rev 3.03 - July, 9Test, A Typedet, Ldtstop#, STRAPL0, 9.1High Impedance Mode, 9.2NAND Tree Mode

Contents

24888 Rev 3.03 - July Data SheetFigure 1 System block diagram 1.1Device Features2004 Advanced Micro Devices, Inc 24888 Rev 3.03 - JulyTable of Contents Configuration space List of FiguresAMD-8151TM AGP Tunnel Data Sheet Figure 1 System block diagramList of Tables 2Ordering Information 3Signal Descriptions 3.1TerminologyAMD-8151BL C 24888 Rev 3.03 - July24888 Rev 3.03 - July 3.2Tunnel Link SignalsAMD-8151TM AGP Tunnel Data Sheet 3.3AGP Signals24888 Rev 3.03 - July 24888 Rev 3.03 - July AMD-8151TM AGP Tunnel Data Sheet3.5 Power and Ground 3.4 Test and Miscellaneous Signals3.5.1Power Plane Sequencing 4.3Clocking 4.2Reset And Initialization24888 Rev 3.03 - July 4Functional Operation 4.1Overview4.5AGP 24888 Rev 3.03 - July4.4Tunnel Links 4.4.1Link PHY4.5.2Various Behaviors 24888 Rev 3.03 - JulyAGP transaction Link transaction5Registers 5.1Register Overview Figure 2 Configuration space5.1.1Configuration Space 24888 Rev 3.03 - JulyTable 5 Register attributes Table 3 Configuration spaces5.2AGP Device Configuration Registers Table 4 Memory mapped address spacesDescription AGP Device Status And Command RegisterDevA BitsDescription 24888 Rev 3.03 - JulyDevA BitsBits AMD-8151TM AGP Tunnel Data SheetAGP Miscellaneous Control Register DevADescription 24888 Rev 3.03 - JulyAGP PHY Control Register DevADescription AGP PHY Skew Control RegisterDevA BitsBits 24888 Rev 3.03 - JulyAGP Most Recent Request Register DevADescription AGP Command Register24888 Rev 3.03 - July BitsAGP Aperture Size Register AGP Control RegisterBits DescriptionGARTHI GART base address register high Link Command RegisterBits DescriptionDescription Link Configuration And Control Register24888 Rev 3.03 - July Bits24888 Rev 3.03 - July Bits 24888 Rev 3.03 - JulyLink Frequency Capability 0 Register DevA 0xCCBits 24888 Rev 3.03 - JulyLink PHY Compensation Control Registers DevA 0xE8, E4, E0Bits Description Clock Control RegisterAGP Bridge Vendor And Device ID Register 5.3AGP Bridge Configuration RegistersAGP Bridge Status And Command Register 24888 Rev 3.03 - JulyAGP Bridge Memory Base-LimitRegisters DevBBits DescriptionBits 24888 Rev 3.03 - JulyBits DescriptionBits AMD-8151TM AGP Tunnel Data SheetBits Description6Electrical Data 6.1Absolute Ratings Table 6 Absolute maximum ratingsTable 7 Operating ranges 24888 Rev 3.03 - July6.3DC Characteristics Table 8 Current and power consumption24888 Rev 3.03 - July Input low voltage Table 12 AC data for clocks 6.4AC Characteristics24888 Rev 3.03 - July 24888 Rev 3.03 - July AMD-8151TM AGP Tunnel Data SheetA PCLK to transmit strobe first strobe edge 7Ball Designations AMD-8151TM AGP Tunnel Data SheetFigure 3 Ball designations 24888 Rev 3.03 - JulySignal name AMD-8151TM AGP Tunnel Data SheetSignal name Signal nameSignal AMD-8151TM AGP Tunnel Data SheetSignal Signal24888 Rev 3.03 - July 8Package SpecificationAMD-8151TM AGP Tunnel Data Sheet Figure 4 Package mechanical drawingTEST 24888 Rev 3.03 - July9Test ModeAMD-8151TM AGP Tunnel Data Sheet NAND tree 2 output signal is STRAPL424888 Rev 3.03 - July 10 Appendix 10.1 Revision History Revision 24888 Rev 3.03 - JulyRevision

9Test

Mode

TEST

A_TYPEDET

LDTSTOP#

STRAPL0

9.1High Impedance Mode

9.2NAND Tree Mode