Mitsubishi DS5000TK manual Serial Port Control Register ±1 Bit Description, ªXmit Bit 8º, 111

USER'S GUIDE

value that generates the required time interval at its overflow. This is the most common mode of communi- cating with a PC COM port or similar device. When talk- ing to a PC in Mode 1, the PC would be set to 8±N±1 ( 8 bits, no parity, 1 stop). Common baud rates are 2400, 9600, and 19200 bps, but it can communicate as fast as 57,600 bps in Mode 1.

Mode 2 is an 11±bit asynchronous mode using 8 or 9±bit words and one stop bit. The time base offers a choice of two fixed relationships of either 32 or 64 oscillator clocks per bit. It is not otherwise programmable in speed. The 9th bit is selected manually. It can be set to a 1, 0, or par- ity. Thus Mode 2 could appear to have two stop bits by selecting the 9th bit to be a logic 1.

Mode 3 is similar to Modes 1 and 2. Like Mode 2, it uses 9±bit words instead of 8. Also like Mode 2, the 9th bit can

be either 0, 1, or parity. Like Mode 1, it uses the Timer 1 mechanism to generate baud rates. This mode can be used with a PC COM port set for 8±N±2 (8 bits, no parity, two stop bits) by setting the 9th bit to a 1. It can also sup- port 8E1 (8 bits, even parity, one stop). Parity is done by transferring the parity bit (PSW.0) to the 9th bit of the se- rial port (SCON.3). Since the CPU sets the parity bit to indicate an odd number of bits in the accumulator, a 9±bit serial word containing this parity bit would have even parity.

The serial port is controlled by the SCON register at SFR location 98h. These bits are described below in Figure 14±1. The serial port begins transmission after software writes to the SBUF register. Data is always shifted out with the LSB first. Each mode is discussed in detail below following Figure 14±1.

SERIAL PORT CONTROL REGISTER Figure 14±1

Bit Description:

SCON.7, SCON.6:		SM0, SM1
ªMode Selectº:			Used to select the operational mode of the serial I/O port as follows:
					BAUD CLOCK
SM0	SM1	MODE	FUNCTION	WORD LENGTH	PERIOD
0	0	Mode 0	Sync	8 bits	12 tCLK
0	1	Mode 1	Async	10 bits	Timer 1 Overflow
1	0	Mode 2	Async	11 bits	64 tCLK or 32 tCLK
1	1	Mode 3	Async	11 bits	Timer 1 Overflow
Initialization:		Cleared to a 0 on any type of reset.
SCON.5:		SM2
ªMultiple MCU Comm.º:			Used to enable the multiple microcontroller communications feature for
		Modes 2 and 3. When SM2=1, RI will be activated only when serial words
		are received which cause RB8 to be set to 1.
Initialization:		Cleared to a 0 on any type of reset.
SCON.4:		REN
ªReceive	Enableº:		When set to 1, the receive shift register will be enabled. Disabled when
		cleared to 0.
Initialization:		Cleared to a 0 on any type of reset.
SCON.3:		TB8
ªXmit Bit 8º:			Can be set or cleared to define the state of the 9th data bit in Modes 2 and 3 of
		a serial data word.
Initialization:		Cleared to a 0 on any type of reset.

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