Mitsubishi DS907x SIP, DS5000TK manual Reset Conditions, Reset Sources, Reset Status Bits ±1

USER'S GUIDE

SECTION 10: RESET CONDITIONS

Reset Sources

The Secure Microcontroller family is designed to pro- vide proper reset operation with a minimum of external circuitry. In fact, for may applications, external reset cir- cuitry is not required. The possible sources of reset are as follows:

a)Power On (operating voltage applied to VCC)

b)No VLI Power On

c)External RST pin

d)Watchdog Timeout

Certain actions are taken in all cases where a reset has been issued. Whenever any type of reset is executed, the ALE and PSEN quasi±bidirectional pins are confi- gured as inputs. In addition, an internal reset line (IRST) is active continuously until the condition which is caus- ing the reset has been removed. IRST will then go inac- tive and execution of the application program will begin. Special Function Registers are initialized during reset as shown in Table 10±1.

Figure 10±1 is a summary of the bits that indicate the source of the most recent reset. Operational details which are unique to the different sources of reset are discussed below:

RESET STATUS BITS Figure 10±1

PCON.6:	POR
ªPower On Resetº:	Indicates that the previous reset was initiated during a Power On.
Initialization:	Cleared to a 0 whenever a Power On Reset occurs; remains unchanged on
	other types of resets. Must be set to a 1 by software.
Read Access:	Can be read normally anytime.
Write Access:	Can be written only by using the Timed Access register.

PCON.4:	WTR
ªWatchdog Timer Resetº:	Set to a 1 when a timeout condition of the Watchdog Timer occurs. Cleared
	to a 0 immediately following a read operation.
Initialization:	Set to a 1 on a Watchdog Timeout Reset. Remains unchanged on any other
	type of reset.
Read Access:	Read normally anytime.
Write Access:	Not writable.

PCON.2:	EWT
ªEnable Watchdog Timerº:	The Watchdog Timer is enabled if EWT is set to a 1 and is disabled if EWT is
	cleared to a 0. This is not normally considered a status bit but is convenient
	for detecting a No VLI reset condition.
Initialization:	Cleared to a 0 on a No±VLI Power On Reset. Remains unchanged during
	other types of reset.
Read Access:	May be read normally anytime.
Write Access:	Writable only by using the Timer Access register.

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