Mitsubishi DS5000TK, DS907x SIP manual Expanded Program Memory Fetch ±4, 127

USER'S GUIDE

Multiplexed address and data information appear on the Port 0 pins as Program Memory fetches are performed on the Expanded Bus. The falling edge of ALE can be used to signal when the lowest eight bits of valid ad- dress information are being output on Port 0 when such a fetch occurs. In addition, ALE is activated twice every machine cycle during access to Program Memory, re- gardless of whether the fetch takes place to RAM or to the Expanded Bus. Whenever a Program Memory fetch takes place on the Expanded Bus, the SFR latch for Port 0 is written with all 1's (0FFH) so that the original in- formation contained in this register is lost. Port 0 pins are driven with internal buffers when 1's are output dur- ing Expanded Program Memory cycles.

The PSEN signal is provided as the read strobe pulse for Expanded Program Memory fetches. When the Secure Microcontroller is accessing Program Memory

from Byte±wide RAM, PSEN will remain inactive. Dur- ing Program Memory fetches on the Expanded Bus, it is activated twice every machine cycle, except when a MOVX instruction is being executed. As discussed in the previous section, not all bytes fetched from Expand- ed Program Memory are actually used by the CPU dur- ing instruction execution. A complete memory cycle, in- cluding the enabled and disabling of both ALE and

PSEN, takes six clock oscillator periods. This is one± half of a machine cycle.

EXPANDED PROGRAM MEMORY FETCH Figure 15±4

		MACHINE CYCLE		MACHINE CYCLE
ALE
PSEN
			DATA		DATA
		DATA	SAMPLED	DATA	SAMPLED
		SAMPLED		SAMPLED
PORT 0		PCL	PCL	PCL	PCL
		OUT	OUT	OUT	OUT
PORT 2	PCH OUT	PCH OUT	PCH OUT	PCH OUT	PCH OUT

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