Table of Contents
Software Security
Introduction
Separate ADDRESS/DATA BUS
Large Nonvolatile Memory
IN±SYSTEM Loading
High Reliability Operation
Module Description ON±BOARD Memory Package
Product Description
DS5000FP Soft Microprocessor Chip
DS5000T Soft Microcontroller Module
DS2250T Soft Microcontroller Module
DS5002FP Secure Microprocessor Chip
DS2251T 128K Soft Microcontroller Module
DS2252T Secure Microcontroller Module
Selection Guide
Chip Description Maximum Speed Part Number
Module Description
Speed Clock Part Number
Secure Microcontroller Architecture
Secure Microcontroller Architectural Block Diagram Figure
Timed Access Logic
Parallel I/O
Program/Data RAM Interface
High±Reliability Circuitry
Watchdog Timer
Resident Loader ROM
Programmers Guide
Secure Microcontroller Memory Organization
Secure Microcontroller Memory MAP ±1
Internal Registers
Scratchpad Register MAP ±2
PSW.4±3 R1±R0 Register Bank Select
Program and Data Memory
Bank Starting Address R0
DS5000 Series Memory Organization
Important Application Note
Memory map. The first is the EA pin. The second is
DS5000 Series Memory MAP ±3
Overrides the condition of the EA pin as well
DS5000 Series Mcon Register ±4 Bit Description
DS5000 Memory Map Control
PA3
DS5001/DS5002 Memory Organization
MCON.3
RA32/8
MCON.2 ECE2
RG1 RG0 Range CE1 Access CE2 Access
PA3 PA2 PA1 PA0 Partition BYTE±WIDE BUS Memory MAP
Msel RG1 RG0 Program Data Program Access Data Access
Partitionable Memory MAP for DS5001/DS5002 Series ±5
CE1 CE3 CE4
CE1 CE2 CE3
NON±PARTITIONABLE Memory MAP for DS5001, DS5002 Series ±6
DS5001/DS5002 Memory Mapped Peripherals
Peripheral Enables in the Data Memory MAP ±7
DS5001/DS5002 Memory Map Control
DS5001/DS5002 Series Mcon Register ±8
PA3 PA2 PA1 PA0 RG1 PES
MCON.3 RG1
MCON.2 PES
Loading and Reloading Program Memory
RPCTL.5 Exbs
RPCTL.4
RPCTL.0 RG0
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Reloading Portions of a DS5000 Series Device ±10
Soft Reload of a DS5001/DS5002
Reloading a DS5001/DS5002 Series Device ±11
Special Function Registers
DS5000 Series Special Function Register MAP ±12
ECE2
DS5001/DS5002 Series Special Function Register MAP ±13
CRC
Power Control Register
Label Pcon Register Address 087H
PCON.3EPFW
PCON.2 EWT
PCON.1 Stop
PCON.0 IDL
Timer Control Register
Label Tcon Register Address 088H
Timer Mode Register
Label Tmod Register Address 089H
TCON.0 IT0
Gate
Serial Control Register
LabelSCON Register Address 098H
Interrupt Enable Register
LabelIE Register Address 0A8H
SCON.0
ET1
Interrupt Priority Register
LabelIP Register Address 0B8H
DS5001 CRC Register
Label CRC Register Address 0C1H
RNGE3±0
CRC.1 MDM
DS5000 Memory Control Register
LabelMCON Register Address 0C6H
PA3 PA2 PA1 PA0
RA32/8
Label Mcon Register Address 0C6H
DS5001 Mcon Register
MCON.0
Accessed by Movx instructions on the Byte±wide bus
Program Status Word Register
LabelPSW Register Address 0D0H
DS5001/DS5002 RPC Control Register
Label Rpctl Register Address 0D8H
RPCTL.7 RNR
RPCTL.3 IBI
DS5001/DS5002 RPC Status Register
Label RPS Register Address 0DAH
RPCTL.1 Rpcon
IA0
RPS.1
IBF
RPS.0
OBF
Instruction SET
Addressing Modes
ADD A, R4
Setb 00H
±20 Branch to the location PC+2 ±
Addressing
Acall 100H Call to the subroutine at
Address
Program Status Flags
Instructions That Affect Flag Settings
Flags Instruction OV AC
Memory Interconnect
Recommended SRAMs for USE with Soft Microcontrollers ±1
Data Reten Part Tion Current RAM Size Vendor
25C 40C 70C
DS5000 Series Module Block Diagram ±2
Memory Interconnect of the DS5000FP ±1
Óóóóóóóóó Ó
Memory Interconnect of the Partitionable DS5001/DS5002 ±3
Óóóóóóóó 52 14Ó GND
Memory Interconnect Using the 128K Sram ±5
DS2251T±128 Block Diagram ±6
DS2252T±32 Block Diagram ±7
Ôôôôôô
Battery Backed Circuits
LITHIUM/BATTERY Backup
Data Retention
Power Supply Slew Rate ±1
Battery Attach Procedure
Battery Lifetime
Battery attached
180 * 10±3
54 * 10±3
2400 + 75 * 10±9 * 24 21.68 * 10±3
Lithium Battery Usage
Freshness Seal
Power Management
Idle Mode
CONTROL/STATUS Bits for Power Control ±1 Bit Description
ªPower On Resetº
Stop Mode
Mode Program ALE Psen Memory
PIN States in IDLE/STOP Modes ±1
PCON.3 Epfw
Secure Microcontroller Power Cycling Timing ±2
Voltage Monitoring Circuitry
Power Fail Interrupt
Total Power Failure
Partial Power Failures
Vpfw threshold is above the specified minimum
Secure Microcontroller Power Management ±3
Reset Vector
Timed Access ±1
Timed Access
Software Control
Timed Access Protected Control Bits ±1
BIT Name Micro Version Location Description
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0C7H, #055H 2nd TA Value
Watchdog Timer ±2
IP.7
Watchdog Timer Control Bits
CRC Memory Verification
DS5001 CRC Register Address 0C1h
Range 3±0
CRC.1
CRC.0
CRC Code Example ±3
This routine tests the CRC±16 circuit in the DS5001FP
Feature
Firmware Security
Security Overview
DS5001 DS5000 DS5002
RAM Memory
Security Lock
Encrypted Memory
DS5000 Software Encryption Block Diagram ±1
DS5002 Software Encryption Block Diagram ±2
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Encryption Key
Encryption Algorithm
Encryption Key Selection and Loading
Dummy Bus Access
Dummy BUS Access Timing ±3
On±chip Vector RAM
Self±Destruct Input
Microprobe/Die Top Coating
Random Number Generator
DS5000FP / DS5000T / DS2250T
Security Summary by Part
DS5001FP / DS2251T
Application Advanced Security Techniques
External Circuits
Change Code
Tamper Protection
Reset Sources
Reset Conditions
Reset Status Bits ±1
Reset Condition Reset Type
Special Function Register Reset States ±1
Register
Power on Reset Timing ±2
Power On Reset
Chanical and some time is required to get the mass
External Reset
No±VLI Power On Reset
Watchdog Timer Reset
Memory Interrupts TIMERS/SERIAL Protection
Application Reset Routine Example
Memory Map
Interrupts
Timed ± DS5000 only
Timers
Tively. Shown here is an example of Timer and Serial
Microprocessor disables timer activity excluding
Protection
Interrupt Source Enable BIT Location
Interrupts
Interrupt Sources
Interrupt Source Vector Address Flag Flag Location
Timer Interrupts
Power±fail Warning Interrupt
Machine cycle when the interrupts are enabled. INT0 is
External Interrupts
Simulated Interrupts
Interrupt Request Sources ±1
ET0
Interrupt Enable Control Bits ±2 Bit Description
EX0
Interrupt Priorities
Interrupt Priority Control Bits ±3 Bit Description
Priority Flag Interrupt Source
IP.4
Interrupt Acknowledge Sequence ±4
Interrupt Acknowledge
Flag Vector Address Interrupt Source
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Parallel I/O Overview
Port 0 Functional Circuitry ±1
PIN Name
Function
Port 1 Functional Circuitry
Port 2 Functional Circuitry
Port 3 Functional Circuitry
Output Functions
Parallel Port Output Buffers Ports 1, 2, and 3 ±2
Input Function
READ±MODIFY±WRITE Instructions
Reprogrammable Peripheral Controller RPC
Mnemonic Description
Port 0 D0±7
USE of the RPC Mode ±3
USE of the RPC Mode ±4
Command
RPC Interrupts
RPC Status Register ± Status Address 0DAH ±5
ST7 ST6 ST5 ST4 IAO IBF OBF
RPC Protocol
DMA Operation
Dbbout
103
Port 2 becomes the control signals as shown in ±3
RPC Control Register ± Rpctl Address 0D8H ±6
RNR Exbs IBI DMA Rpcon RG0
Rpcon bit is set
TMOD.6 Timer TMOD.2 Timer
Programmable Timers Functional Description
Tmod Register Control BIT Summary ±1 Bit Description
TMOD.5, TMOD.4
Tcon Register CONTROL/STATUS Bits ±2
TMOD.1, TMOD.0
TIMER/COUNTER Mode 0 and 1 Operation ±3
Mode
Scribed for TR0, TF0, and INT0
107
TIMER/COUNTER Mode 2 Operation ±4
108
Timer 0 Mode 3 Operation ±5
109
Mode SYNC/ASYNC Baud Clock
Serial I/O Function Description
Serial Port Operating Modes ±1
START/STOP
Mode Function Word Length Period
Mode Sync Bits CLK Async Timer 1 Overflow
Serial Port Control Register ±1 Bit Description
ªXmit Bit 8º
SCON.2 RB8
SCON.1
SCON.0
Baud Rate Generation
Timer 1 Baud Rate Generation ±2
Synchronous Operation Mode
Smod Timer TH1
Baud Rate BPS
114
Mode 0 Block Diagram and Timing ±2
115
Asynchronous Operation
116
Smod BRG Clock
Mode 2
117
Serial Port Mode 1 Block Diagram ±3
118
MODE2 and 3 Block Diagram ±4
119
Application Serial Port Initialization
Mode Function Word Length Baud Clock
Serial I/O Operating Modes
SM0 SM1 SM2 REN
TB8 RB8
ET1 EX1 ET0 EX0
PT1 PX1 PT0 PX0
TF1 TR1 TF0 TR0
Smod POR PFW WTR Epfw EWT Stop IDL
IE1 IT1 IE0
123
CPU Timing Oscillator
Crystal Connection ±1
Clock Source Input ±2
XTAL1
Instruction Timing
125
Expanded Program Memory Timing
BYTE±WIDE RAM Instruction Execution Timing ±3
126
Expanded Program Memory Fetch ±4
127
Expanded Data Memory Write ±6
Expanded Data Memory Read ±5
128
Complete RD cycle, including activation of ALE and RD
Expanded Data Memory Timing
129
Invoking the Bootstrap Loader
Program Loading Introduction
DS5000FP DS5001/2FP
130
DS5000 Series
DS5001/DS5002 Series
Exiting the Loader
131
132
MODEM=1 PROG=0
Serial Load Configuration ±2
Serial Program Load Mode
133
AUTO±BAUD Rate Detection
Baud Rate
Crystal Freq MHz 300 1200 2400
57600
Bootstrap Loader Initialization
Command Line Interface
Command Line Syntax
Command Function Version
Command Summaries
Begin±address end±address
→ 000AH AB → 00ABH
ABC → 0ABCH Abcd → 0ABCDH Abcde → 0BCDEH
Byte begin±address end±address
Byte±1 byte±2 byte±3 byte±4 byte±5
Byte
P0 value P1 value P2 value P3 value
Xon/Xoff
CRC/MCON/MSL/RPCTL byte
Mcon
MSL
Error Messages Eargreq
Eextarg
Eillcmd
Eillopt
Intel HEX File Format
140
Parallel Program Load Configuration ±3
Parallel Program Load Operation
Parallel Program Load Cycles ±4
141
Parallel Program Load Mode
Mode RST Psen Prog
8751±COMPATIBLE Program Load Cycles ±3
P2.7 P2.6 P2.5
RPC Program Mode Operation
Parallel Programming Concerns
Pulses specified, each with a low time of 90 to
143
DS5000T/DS2250T Functional Block Diagram ±1
REAL±TIME Clock
DS1215 Phantom Time Chip
144
145
Pattern Comparison Register Description ±2
146
DS1215 Register Entry Flowchart ±3
147
DS1215 Time Registers Description ±4
Registers
Special Bits
148
Time Register Examples ±5
149
DS1283 Watchdog Timekeeper Chip
150
Memory MAP
DS2251T/DS2252T RTC Block Diagram ±6
151
DS1283 REAL±TIME Clock Memory MAP ±7
152
DS1283 REAL±TIME Clock Command Register ±8
Alarm Maskbit Operation ±9
Alarm Condition
DS1283 RTC Interrupts
Mask
Application Using the DS5000T RTC DS1215 Example
155
Wbyte
156
RET
157
158
Application Using the DS2251T RTC DS1283 Example
159
160
161
162
163
Troubleshooting
Unexplained Device Resets
RAM Loses Data When Powered Down
Time Microcontroller Reads the Wrong Time
Serial Port does not Work
Unable to Invoke Stop Mode
Program will not Execute
High Current Drain in Stop Mode
Data is Lost or Corrupted
INT0 is Stuck LOW on DS2252T
DS5000TK KIT does not Respond to KIT5K Software
DOS
Instruction SET Details
Mnemonic Instruction Code HEX Byte Cycle Explanation
DA a
CLR a CPL a
RL a
RLC a
RR a
RRC a
Mnemonic Instruction Code HEX Byte
CLR bit Bit =
Setb bit Bit =
CPL bit Bit = bit
ANL C, bit = C and bit
Reti
RET
Dptr
NOP