USER'S GUIDE

SECTION 5: MEMORY INTERCONNECT

The Secure Microcontroller family is divided between chips and modules. This sections illustrates the memory interconnect for the various chips and shows block diagrams of selected modules. The Soft Micropro- cessor chips are 80±pin QFP packages that connect to low power CMOS SRAM. The SRAM connection is made through the Byte±wide bus. When using a chip,

the user must connect this Byte±wide bus to the RAM as shown in this section. In module form, the bus is con- nected inside the package. Table 5±1 shows some of the preferred RAM choices. Note that any standard SRAM will work, but data retention lifetime is dependent on RAM data retention current and battery capacity. Lower currents naturally allow the use of smaller batter- ies. This is covered in detail in Section 6.

RECOMMENDED SRAMs FOR USE WITH SOFT MICROCONTROLLERS Table 5±1

 

 

 

DATA RETEN-

DATA RETEN-

DATA RETEN-

 

 

PART

TION CURRENT

TION CURRENT

TION CURRENT

 

 

 

 

 

RAM SIZE

VENDOR

25°C

40°C

70°C

NUMBER

 

 

 

 

 

 

8K x 8

Dallas

DS2064

0.05 μA

±

±

 

 

 

 

 

 

8K x 8

Sharp

LH5168

±

±

0.6 μA

 

 

 

 

 

 

 

 

 

 

 

 

32K x 8

Hitachi

HM62256LP±SL

±

3 μA

10 μA

 

 

 

 

 

 

32K x 8

Mitsubishi

M5M5256BP±LL

1 μA

±

10 μA

 

 

 

 

 

 

32K x 8

Sony

CXK58257AP±LX

1 μA

2 μA

10 μA

 

 

 

 

 

 

32K x 8

Sony

CXK58527AP±LLX

0.3 μA

0.6 μA

3 μA

 

 

 

 

 

 

 

 

 

 

 

 

128K x 8

Hitachi

HM628128LP±SL

1 μA

±

10 μA

 

 

 

 

 

 

128K x 8

Mitsubishi

M5M51008P±LL

1 μA

±

10 μA

 

 

 

 

 

 

128K x 8

Sony

CXK581000P±LL

1.2 μA

2.4 μA

12 μA

 

 

 

 

 

 

Recommended RAMs are given with the manufactur- ers specified data retention current at 3V. Missing num- bers are conditions unspecified by the manufacturer.

In the case of the DS5000FP, the microprocessor can connect to either one or two SRAMs. They can be 8K by- tes or 32K bytes, though the case of two 8K RAMs is un- likely from a cost perspective. Figure 5±1 illustrates the memory connection of a DS5000FP connected to one

32K x 8. CE1 provides the chip select, and R/W supplies

the WE signal. A second RAM could be added by simply

using CE2 as the chip enable with a common connec- tion for the other signals.

In the case of DS5000 based modules including DS5000(T) and DS2250T, the SRAM is connected as described above. Connections running between the mi- cro chip and RAM are not available at the pins. The DS2250±64 has a second SRAM on CE2. The time- keeping versions also have the real±time clock con-

nected to CE2. A block diagram in Figure 5±2 shows the module configuration with 32K RAM and a real±time clock. This is identical for DS2250 or DS5000 modules. These are functionally identical and only differ in form factor.

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Mitsubishi DS5000TK Memory Interconnect, Recommended SRAMs for USE with Soft Microcontrollers ±1, 25C 40C 70C, Number