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Mitsubishi DS5000TK, DS907x SIP manual Reloading a DS5001/DS5002 Series Device ±11

Models: DS5000TK DS907x SIP

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Page 27

USER'S GUIDE

MOV	TA, #0AAh		; TIMED ACCESS
MOV	TA, #55h	;	TIMED ACCESS 2
MOV	MCON, #00011000b ;		SET PARTITION TO 1000h
		;	USER'S CODE TO LOAD
		;	RAM USING MOVX


MOV	TA, #0AAh		; TIMED ACCESS
MOV	TA, #55h	;	TIMED ACCESS 2
MOV	MCON, #10101000b	;	LOAD NEW PARTITION OF A000h

RELOADING A DS5001/DS5002 SERIES DEVICE Figure 4±11

FFFFh

A000h

4000h

1000h

0000h

DATA

MEMORY

SPACE

PROGRAM

MEMORY

SPACE

BEFORE LOADING PA3±0=0100b

DATA

MEMORY

SPACE

PROGRAM

MEMORY

SPACE

DURING LOADING PA3±0=0001b

DATA

MEMORY

SPACE

PROGRAM

MEMORY

SPACE

AFTER LOADING PA3±0=1010b

RANGE (64K)

NEW PARTITION (40K)

OLD PARTITION (16K)

TEMP PARTITION (4K)

LEGEND:

=NONVOLATILE RAM PROGRAM MEMORY

=NONVOLATILE RAM DATA MEMORY

050396 26/173

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Image 27

Mitsubishi DS5000TK, DS907x SIP manual Reloading a DS5001/DS5002 Series Device ±11

Contents

Table of Contents Introduction Software SecuritySeparate ADDRESS/DATA BUS Module Description ON±BOARD Memory Package Large Nonvolatile MemoryIN±SYSTEM Loading High Reliability OperationDS2250T Soft Microcontroller Module Product DescriptionDS5000FP Soft Microprocessor Chip DS5000T Soft Microcontroller ModuleDS2251T 128K Soft Microcontroller Module DS5002FP Secure Microprocessor ChipDS2252T Secure Microcontroller Module Speed Clock Part Number Selection GuideChip Description Maximum Speed Part Number Module DescriptionSecure Microcontroller Architecture Secure Microcontroller Architectural Block Diagram Figure High±Reliability Circuitry Timed Access LogicParallel I/O Program/Data RAM InterfaceResident Loader ROM Watchdog TimerInternal Registers Programmers GuideSecure Microcontroller Memory Organization Secure Microcontroller Memory MAP ±1Scratchpad Register MAP ±2 Program and Data Memory PSW.4±3 R1±R0 Register Bank SelectBank Starting Address R0 Important Application Note DS5000 Series Memory OrganizationDS5000 Series Memory MAP ±3 Memory map. The first is the EA pin. The second isOverrides the condition of the EA pin as well DS5000 Memory Map Control DS5000 Series Mcon Register ±4 Bit DescriptionPA3 MCON.2 ECE2 DS5001/DS5002 Memory OrganizationMCON.3 RA32/8PA3 PA2 PA1 PA0 Partition BYTE±WIDE BUS Memory MAP RG1 RG0 Range CE1 Access CE2 AccessCE1 CE2 CE3 Msel RG1 RG0 Program Data Program Access Data AccessPartitionable Memory MAP for DS5001/DS5002 Series ±5 CE1 CE3 CE4DS5001/DS5002 Memory Mapped Peripherals NON±PARTITIONABLE Memory MAP for DS5001, DS5002 Series ±6DS5001/DS5002 Memory Map Control Peripheral Enables in the Data Memory MAP ±7MCON.2 PES DS5001/DS5002 Series Mcon Register ±8PA3 PA2 PA1 PA0 RG1 PES MCON.3 RG1RPCTL.0 RG0 Loading and Reloading Program MemoryRPCTL.5 Exbs RPCTL.4050396 23/173 Reloading Portions of a DS5000 Series Device ±10 Soft Reload of a DS5001/DS5002 Reloading a DS5001/DS5002 Series Device ±11 Special Function Registers ECE2 DS5000 Series Special Function Register MAP ±12CRC DS5001/DS5002 Series Special Function Register MAP ±13Label Pcon Register Address 087H Power Control RegisterPCON.0 IDL PCON.3EPFWPCON.2 EWT PCON.1 StopLabel Tcon Register Address 088H Timer Control RegisterGate Timer Mode RegisterLabel Tmod Register Address 089H TCON.0 IT0LabelSCON Register Address 098H Serial Control RegisterET1 Interrupt Enable RegisterLabelIE Register Address 0A8H SCON.0LabelIP Register Address 0B8H Interrupt Priority RegisterCRC.1 MDM DS5001 CRC RegisterLabel CRC Register Address 0C1H RNGE3±0RA32/8 DS5000 Memory Control RegisterLabelMCON Register Address 0C6H PA3 PA2 PA1 PA0DS5001 Mcon Register Label Mcon Register Address 0C6HMCON.0 Accessed by Movx instructions on the Byte±wide bus LabelPSW Register Address 0D0H Program Status Word RegisterRPCTL.3 IBI DS5001/DS5002 RPC Control RegisterLabel Rpctl Register Address 0D8H RPCTL.7 RNRIA0 DS5001/DS5002 RPC Status RegisterLabel RPS Register Address 0DAH RPCTL.1 RpconOBF RPS.1IBF RPS.0Setb 00H Instruction SETAddressing Modes ADD A, R4Address ±20 Branch to the location PC+2 ±Addressing Acall 100H Call to the subroutine atInstructions That Affect Flag Settings Program Status FlagsFlags Instruction OV AC 25C 40C 70C Memory InterconnectRecommended SRAMs for USE with Soft Microcontrollers ±1 Data Reten Part Tion Current RAM Size VendorMemory Interconnect of the DS5000FP ±1 DS5000 Series Module Block Diagram ±2Memory Interconnect of the Partitionable DS5001/DS5002 ±3 Óóóóóóóóó ÓÓóóóóóóó 52 14Ó GND Memory Interconnect Using the 128K Sram ±5 DS2251T±128 Block Diagram ±6 Ôôôôôô DS2252T±32 Block Diagram ±7LITHIUM/BATTERY Backup Battery Backed CircuitsData Retention Battery attached Power Supply Slew Rate ±1Battery Attach Procedure Battery Lifetime54 * 10±3 180 * 10±32400 + 75 * 10±9 * 24 21.68 * 10±3 Freshness Seal Lithium Battery UsageªPower On Resetº Power ManagementIdle Mode CONTROL/STATUS Bits for Power Control ±1 Bit DescriptionPCON.3 Epfw Stop ModeMode Program ALE Psen Memory PIN States in IDLE/STOP Modes ±1Voltage Monitoring Circuitry Secure Microcontroller Power Cycling Timing ±2Vpfw threshold is above the specified minimum Power Fail InterruptTotal Power Failure Partial Power FailuresReset Vector Secure Microcontroller Power Management ±3Timed Access Timed Access ±1Software Control BIT Name Micro Version Location Description Timed Access Protected Control Bits ±1050396 66/173 Watchdog Timer ±2 0C7H, #055H 2nd TA ValueIP.7 CRC Memory Verification Watchdog Timer Control BitsCRC.0 DS5001 CRC Register Address 0C1hRange 3±0 CRC.1This routine tests the CRC±16 circuit in the DS5001FP CRC Code Example ±3DS5001 DS5000 DS5002 FeatureFirmware Security Security OverviewSecurity Lock RAM MemoryEncrypted Memory DS5002 Software Encryption Block Diagram ±2 DS5000 Software Encryption Block Diagram ±1050396 74/173 Encryption Algorithm Encryption KeyEncryption Key Selection and Loading Dummy BUS Access Timing ±3 Dummy Bus AccessRandom Number Generator On±chip Vector RAMSelf±Destruct Input Microprobe/Die Top CoatingSecurity Summary by Part DS5000FP / DS5000T / DS2250TDS5001FP / DS2251T Application Advanced Security Techniques Change Code External CircuitsTamper Protection Reset Conditions Reset SourcesReset Status Bits ±1 Special Function Register Reset States ±1 Reset Condition Reset TypeRegister Power On Reset Power on Reset Timing ±2Chanical and some time is required to get the mass No±VLI Power On Reset External ResetWatchdog Timer Reset Application Reset Routine Example Memory Interrupts TIMERS/SERIAL ProtectionMemory Map Timed ± DS5000 only InterruptsProtection TimersTively. Shown here is an example of Timer and Serial Microprocessor disables timer activity excludingInterrupt Source Vector Address Flag Flag Location Interrupt Source Enable BIT LocationInterrupts Interrupt SourcesExternal Interrupts Timer InterruptsPower±fail Warning Interrupt Machine cycle when the interrupts are enabled. INT0 isInterrupt Request Sources ±1 Simulated InterruptsInterrupt Enable Control Bits ±2 Bit Description ET0EX0 IP.4 Interrupt PrioritiesInterrupt Priority Control Bits ±3 Bit Description Priority Flag Interrupt SourceInterrupt Acknowledge Interrupt Acknowledge Sequence ±4Flag Vector Address Interrupt Source 050396 94/173 Function Parallel I/O OverviewPort 0 Functional Circuitry ±1 PIN NamePort 2 Functional Circuitry Port 1 Functional CircuitryOutput Functions Port 3 Functional CircuitryInput Function Parallel Port Output Buffers Ports 1, 2, and 3 ±2Port 0 D0±7 READ±MODIFY±WRITE InstructionsReprogrammable Peripheral Controller RPC Mnemonic DescriptionRPC Interrupts USE of the RPC Mode ±3USE of the RPC Mode ±4 CommandST7 ST6 ST5 ST4 IAO IBF OBF RPC Status Register ± Status Address 0DAH ±5103 RPC ProtocolDMA Operation DbboutRpcon bit is set Port 2 becomes the control signals as shown in ±3RPC Control Register ± Rpctl Address 0D8H ±6 RNR Exbs IBI DMA Rpcon RG0Programmable Timers Functional Description TMOD.6 Timer TMOD.2 TimerTmod Register Control BIT Summary ±1 Bit Description Tcon Register CONTROL/STATUS Bits ±2 TMOD.5, TMOD.4TMOD.1, TMOD.0 107 TIMER/COUNTER Mode 0 and 1 Operation ±3Mode Scribed for TR0, TF0, and INT0108 TIMER/COUNTER Mode 2 Operation ±4109 Timer 0 Mode 3 Operation ±5START/STOP Mode SYNC/ASYNC Baud ClockSerial I/O Function Description Serial Port Operating Modes ±1ªXmit Bit 8º Mode Function Word Length PeriodMode Sync Bits CLK Async Timer 1 Overflow Serial Port Control Register ±1 Bit DescriptionBaud Rate Generation SCON.2 RB8SCON.1 SCON.0Baud Rate BPS Timer 1 Baud Rate Generation ±2Synchronous Operation Mode Smod Timer TH1114 115 Mode 0 Block Diagram and Timing ±2116 Asynchronous OperationMode 2 Smod BRG Clock117 118 Serial Port Mode 1 Block Diagram ±3119 MODE2 and 3 Block Diagram ±4Mode Function Word Length Baud Clock Application Serial Port InitializationSerial I/O Operating Modes PT1 PX1 PT0 PX0 SM0 SM1 SM2 RENTB8 RB8 ET1 EX1 ET0 EX0Smod POR PFW WTR Epfw EWT Stop IDL TF1 TR1 TF0 TR0IE1 IT1 IE0 123 XTAL1 CPU Timing OscillatorCrystal Connection ±1 Clock Source Input ±2125 Instruction TimingBYTE±WIDE RAM Instruction Execution Timing ±3 Expanded Program Memory Timing126 127 Expanded Program Memory Fetch ±4Expanded Data Memory Read ±5 Expanded Data Memory Write ±6128 Expanded Data Memory Timing Complete RD cycle, including activation of ALE and RD129 130 Invoking the Bootstrap LoaderProgram Loading Introduction DS5000FP DS5001/2FP131 DS5000 SeriesDS5001/DS5002 Series Exiting the LoaderMODEM=1 PROG=0 132Serial Program Load Mode Serial Load Configuration ±2133 57600 AUTO±BAUD Rate DetectionBaud Rate Crystal Freq MHz 300 1200 2400Command Function Version Bootstrap Loader InitializationCommand Line Interface Command Line SyntaxABC → 0ABCH Abcd → 0ABCDH Abcde → 0BCDEH Command SummariesBegin±address end±address → 000AH AB → 00ABHP0 value P1 value P2 value P3 value Byte begin±address end±addressByte±1 byte±2 byte±3 byte±4 byte±5 ByteMSL Xon/XoffCRC/MCON/MSL/RPCTL byte MconEillopt Error Messages EargreqEextarg Eillcmd140 Intel HEX File Format141 Parallel Program Load Configuration ±3Parallel Program Load Operation Parallel Program Load Cycles ±4P2.7 P2.6 P2.5 Parallel Program Load ModeMode RST Psen Prog 8751±COMPATIBLE Program Load Cycles ±3143 RPC Program Mode OperationParallel Programming Concerns Pulses specified, each with a low time of 90 to144 DS5000T/DS2250T Functional Block Diagram ±1REAL±TIME Clock DS1215 Phantom Time Chip145 146 Pattern Comparison Register Description ±2147 DS1215 Register Entry Flowchart ±3148 DS1215 Time Registers Description ±4Registers Special Bits149 Time Register Examples ±5150 DS1283 Watchdog Timekeeper ChipDS2251T/DS2252T RTC Block Diagram ±6 Memory MAP151 152 DS1283 REAL±TIME Clock Memory MAP ±7DS1283 REAL±TIME Clock Command Register ±8 Mask Alarm Maskbit Operation ±9Alarm Condition DS1283 RTC Interrupts155 Application Using the DS5000T RTC DS1215 Example156 Wbyte157 RET158 159 Application Using the DS2251T RTC DS1283 Example160 161 162 163 Time Microcontroller Reads the Wrong Time TroubleshootingUnexplained Device Resets RAM Loses Data When Powered DownUnable to Invoke Stop Mode Serial Port does not WorkProgram will not Execute DS5000TK KIT does not Respond to KIT5K Software High Current Drain in Stop ModeData is Lost or Corrupted INT0 is Stuck LOW on DS2252TDOS Mnemonic Instruction Code HEX Byte Cycle Explanation Instruction SET DetailsCLR a CPL a DA aRRC a RL aRLC a RR aMnemonic Instruction Code HEX Byte ANL C, bit = C and bit CLR bit Bit =Setb bit Bit = CPL bit Bit = bitRET RetiDptr NOP