USER'S GUIDE

The timekeeper contains a shift register with 128 loca- tions. The first 64 locations correspond to a pattern shown in Figure 17±2. The next 64 are time data. Be- fore access to time data may occur, the 64±bit pattern must be written. The incoming bits are checked by a pattern recognition circuit. As each correct bit of the pat- tern is received, the pointer is advanced. Any incorrect bit will cause the pointer to stop, and it may only be reset by a read operation. When the 64 bits of the pattern have been correctly written, access to RTC data begins. The next 64 bits are time data according to Figure 17±4. When the 64 bits of time data have been read or written (each bit increments the pointer), the pointer has com- pleted its cycle of 128. The next time access is initiated by writing the pattern again. The pointer should be reset with a read operation, to set it to a known location.

To write a data bit to the RTC, a MOVX instruction that forces A2 low and A0 to the state of the bit must be per- formed. All other address lines should be low. Address line A2 can be thought of as the write enable to the clock and A0 as the input bit. Therefore, to write the 64 bits of the pattern recognition sequence, 64 MOVX instruc- tions must be executed. A read is performed in a similar manner, but A2 is high. Notice that data is encoded into the address line. Either a MOVX A, @DPTR or MOVX @DPTR, A will accomplish a write if the DPH contains 00H, and DPL contains 0000000Xb. The data bit is A0. The R/W signal is irrelevant.

To read a data bit from the clock once the 64±bit pattern has been entered, a MOVX instruction (MOVX A, @Ri or MOVX A, @DPTR) must be executed that sets A2 to a 1. The data bit desired will then be returned in bit 7 of the accumulator. Therefore, to retrieve the 8 bytes of time information in the clock, 64 read MOVX instructions must be executed.

Since the clock pointer increments for each memory ac- cess (read or write), extra reads or writes must not be performed (the pointer would move accidently). For this reason, any interruption of the time read/write process should close ECE2 immediately. An inadvertent memory access to this space would move the pointer, and time data would appear to be garbage on returning to timekeeping. If possible, interrupts should be dis- abled when executing time transactions.

Note that the clock access is performed as a Byte±wide memory access. The EA pin must remain high. If this pin is low, all memory access is directed outside the chip via the expanded bus. Therefore, the timekeeper would be outside the current memory map.

Figure 17±3 is a flowchart which summarizes how to ac- cess the time for retrieval and modification. Also, an application example at the end of this section lists a pro- gram which contains sample subroutines for communi- cating with the clock.

IMPORTANT APPLICATION NOTE

The ECE2 bit used to access the DS1215 on the DS5000T and DS2250T is non±volatile. If the processor is reset or power is lost during an access to the RTC (while ECE2=1), it will maintain its state following reset. This unintentional setting of the ECE2 bit may interfere with MOVX instructions if software expects the bit to be cleared following reset. As a general precaution, it is recommended that the ECE2 bit be cleared as part of the reset routine of the device.

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Mitsubishi DS5000TK, DS907x SIP manual Important Application Note, 145