Motorola MC68VZ328 10.4.5 Port D Registers

10-16 MC68VZ328 User’s Manual 
Programming Model
10.4.5 Port D Registers
Unlike the other ports, Port D is unique in that it is comprised of eight 8-bit I/O registers. They consist of
the following:
• Port D direction register (PDDIR)
• Port D data register (PDDATA)
• Port D pull-up enable register (PDPUEN)
• Port D select register (PDSEL)
• Port D polarity register (PDPOL)
• Port D interrupt request enable regi ster (PDIRQEN)
• Port D keyboard enable register (PDKBEN)
• Port D interrupt request edge regist er (PDIRQEG)
10.4.5.1 Port D Direction Register
The Port D direction register controls the direction (input or output) of the line associated with the
PDDATA bit position. When the data bit is assigned to a dedicated I/O function b y the PDSEL re gister, the
DIR bits are ignored. The settings for the PDDIR bit positions are shown in Table10-17.
PDDIR Port D Direction Register 0x(FF)FFF418
BIT 7654321BIT 0
DIR7 DIR6 DIR5 DIR4 DIR3 DIR2 DIR1 DIR0
TYPE rw rw rw rw rw rw rw rw
RESET 00000000
0x00
Table 10-17. Port D Direction Register Description
Name Description Setting
DIRx
Bits 7–0 Direction—These bits control the direction of the pins in an 8-bit sys- tem. They reset to 0. 0 = Input 1 = Output