Motorola MC68VZ328 10.4.10 Port K Registers

10-34 MC68VZ328 User’s Manual 
Programming Model
10.4.10 Port K Registers
Port K is composed of the following 8-bit general-purpose I/O registers:
• Port K direction register (PKDIR)
• Port K data register (PKDATA)
• Port K pull-up/-down enable register (PKPUEN)
• Port K select register (PKSEL)
Each signal in the PKDATA register connects to an external pin. As on the other ports, each bit on Port K
is individually configured.
10.4.10.1 Port K Direction Register
The direction register controls the direction (input or output) of the line associated with the PKDATA bit
position. When the data bit is assigned to a dedicated I/O function by the PKSEL register, the DIR bit s ar e
ignored. The settings for the PKDIR register bit positions are shown in Table10-46.
PKDIR Port K Direction Register 0x(FF)FFF440
10.4.10.2 Port K Data Register
The settings for the PKDATA register bit positions are shown in Table10-47 on page 10-35.
BIT 7654321BIT 0
DIR7 DIR6 DIR5 DIR4 DIR3 DIR2 DIR1 DIR0
TYPE rw rw rw rw rw rw rw rw
RESET 00000000
0x00
Table 10-46. Port K Direction Register Description
Name Description Setting
DIRx
Bits 7–0 Direction—These bits control the direction of the pins in an 8-bit system. They reset to 0. 0 = The pins are inputs. 1 = The pins are outputs.