GP Timer Overview
General-Purpose Timers 12-3
12.1.3 Timer Capture Register
Each timer has a 16-bit capture register that takes a “snapshot” of the timer counter when a defined
transition of the signal applied to the TIN pin is detected by the capture edge detector. There are three
transitions of the TIN that can trigger a ca pture event:
• Capture on rising edge
• Capture on falling edge
• Capture on rising or falling edge
The type of transition that triggers the capture is selected by the CAP field of the TCTLx register. Pulses
that produce the capture edge can be as short as 20ns. The minimum time between pulses is two PCLK
periods.
When a capture event occurs, the CAPT status bit is set in the TSTATx register. A TIMERx interrupt is
sent to the MC68VZ328 interrupt controller if the capture function is enabled and the IRQEN bit of the
TCTLx register is set. The timer is disable d at reset.
12.1.4 TOUT/TIN/PB6 Pin
The TOUT/TIN pins are multiplexed with bit 6 of the Port B regis ters. The Port B registe rs dete rmine i f the
pin is assigned to the GP timers or to pin 6 of Port B (the default setting), as described in Section10.4.2.3,
“Port B Dedicated I/O Functions,” on page10-10. Because the TOUT/TIN/PB6 is a bidirectional pin, the
direction of the pin is also controlled in the Port B registers.
NOTE:
Unlike other port register pins, the TOUT/TIN/PB6 pin direction is still
controlled by the DIR6 bit in the Port B direction register even though the
pin is assigned to the GP timers.
When the in direction is selected, the pin (TIN) is available as a clock input to the timer or as the input
trigger to the edge-detect circuit for the capture registers. The T[1:0] field in the periphe ral con tro l regi ster
(PCR) switches the TIN input between capture register 1 and capture register 2. When T= 0x00 the TIN is
connected to Timer 1, and when T= 0x01 the TIN is connected to Timer 2.
When the out direction is enabled, the pin (TOUT) is used to toggle or output a pulse when a timer
compare event occurs.