Motorola MC68VZ328 19.3.17 Page-Miss SDRAM CPU Write Cycle (CAS

19-22 MC68VZ328 User’s Manual 
AC Electrical Characteristics
19.3.17 Page-Miss SDRAM CPU Write Cycle (CAS
Latency = 1)
Figure 19-18 shows the timing diagram for the page-miss SDRAM CPU write cycle for 8-bit SDRAM.
The signal values and units of measure for this figure are found in Table19-16 on page 19-31. Detailed
information about the operation of individual signals can be found in both Chapter 8, “LCD Controller,”
and Chapter 7, “DRAM Controller.”
Figure 19-18. Page-Miss SDRAM CPU Write Cycle Timing Diagram
S0
17
S2 S4 S4 S6 S7S5S4S3S1
SDCLK
RAS
SCKEN
D[15:0]
CAS
A[16:1]/MD[15:0]
SDA10
CS
WE
DQM
DTACK
Active
Command
Precharge
Command Write Command
8
Bank Row Col
1=All Bank
11 15