Motorola MVME2600 manual Serial Communications Interface, Bit Timers

Block Diagram

❏Counter 2 provides the tone for the speaker output function on the PIB controller (the SPEAKER_OUT signal which can be cabled to an external speaker via the remote reset connector).

The interval timers use the OSC clock input as their clock source. The MVME2603/2604 drives the OSC pin with a 14.31818 MHz clock source.

16-Bit Timers

Four 16-bit timers are available on the MVME2603/2604. The PIB controller supplies one 16-bit timer; the Z8536 CIO device provides the other three. For information on programming these timers, refer to the data sheets for the W83C553 PIB controller and the Z8536 CIO device, as listed in Appendix D, Related Documentation.

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Serial Communications Interface

The MVME2603/2604 uses a Zilog Z85230 ESCC (Enhanced Serial Communications Controller) to implement the two serial communications interfaces, which are routed through P2. The Z85230 supports synchronous (SDLC/HDLC) and asynchronous protocols. The MVME2603/2604 hardware supports asynchronous serial baud rates of 110B/s to 38.4KB/s.

Each interface supports the CTS, DCD, RTS, and DTR control signals as well as the TxD and RxD transmit/receive data signals, and TxC/RxC synchronous clock signals. Since not all modem control lines are available in the Z85230, a Z8536 CIO is used to provide the missing modem lines.

A PAL device performs decoding of register accesses and pseudo interrupt acknowledge cycles for the Z85230 and the Z8536 in ISA I/O space. The PIB controller supplies DMA support for the Z85230.

The Z85230 receives a 10MHz clock input. The Z85230 supplies an interrupt vector during pseudo interrupt acknowledge cycles. The vector is modified within the Z85230 according to the interrupt source. Interrupt request levels are programmed via the PIB controller. Refer to the Z85230 data sheet and to the MVME2603/ MVME2604 Programmer’s Reference Guide, both listed in Appendix D, Related Documentation, for further information.

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