Motorola MVME2600 manual Configuring the VMEbus Interface

6

CNFG and ENV Commands

L2 Cache Parity Enable [On-Detection/Always/Never - O/A/N] = O?

OL2 Cache parity is enabled upon detection. (Default)

AL2 Cache parity is always enabled.

NL2 Cache parity is never enabled.

PCI Interrupts Route Control Registers (PIRQ0/1/2/3) = 0A0B0E0F?

Initializes the PIRQx (PCI Interrupts) route control registers in the IBC (PCI/ISA bus bridge controller). The ENV parameter is a 32-bit value that is divided by four to yield the values for route control registers PIRQ0/1/2/3. The default is determined by system type. For details on PCI/ISA interrupt assignments and for suggested values to enter for this parameter, refer to the 8259 Interrupts section of the MVME2600 Programmer’s Reference Guide, listed in Appendix D, Related Documentation.

Configuring the VMEbus Interface

ENV asks the following series of questions to set up the VMEbus interface for the MVME2300/MVME2600/MVME3600 /MVME4600 series modules. To perform this configuration, you should have a working knowledge of the Universe ASIC as described in the Programmer’s Reference Guide.

VME3PCI Master Master Enable [Y/N] = Y?

YSet up and enable the VMEbus Interface. (Default)

NDo not set up or enable the VMEbus Interface.

PCI Slave Image 0 Control = 00000000?

The configured value is written into the LSI0_CTL register of the

Universe chip.

PCI Slave Image 0 Base Address Register = 00000000?

The configured value is written into the LSI0_BS register of the

Universe chip.

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