Motorola MVME2600 manual Cache Mode Control J3, Flash Bank Selection J10

MVME2603/2604 Base Board Preparation 1

Cache Mode Control (J3)

256KB of L2 cache memory is available on the MVME2603/2604. L2 cache operation is transparent to users, but its write-through mode is configurable via header J3 on older boards. On newer MVME2603/2604 boards, header J3 is not provided. With a jumper installed on J3, cache write-through is under CPU control. With the jumper removed, cache write-through occurs in all cases.

	J3			J3
2		1	2
					1
Cache Write-Through under CPU Control			Cache Write-Through Always
			(factory configuration)

Flash Bank Selection (J10)

The MVME2603/2604 base board has provision for 1MB of 16-bit Flash memory. The RAM200 memory mezzanine accommodates 4MB or 8MB of additional 64-bit Flash memory.

The Flash memory is organized in either one or two banks, each bank either 16- or 64-bits wide. Both banks contain the onboard debugger, PPCBug.

To enable Flash bank A (4MB or 8MB of firmware resident on soldered- in devices on the RAM200 mezzanine), place a jumper across header J10 pins 1 and 2. To enable Flash bank B (1MB of firmware located in sockets on the base board), place a jumper across header J10 pins 2 and 3.

	J10		J10
3		3
2		2
1		1
Flash Bank A Enabled (4MB/8MB, Soldered)		Flash Bank B Enabled (1MB, Sockets)
(factory configuration)

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