Motorola MVME2600 specification

ENV – Set Environment

Network PReP-Boot Mode Enable [Y/N] = N?

YEnable PReP-style network booting (same boot image from a network interface as from a mass storage device).

NDo not enable PReP-style network booting. (Default)

Negate VMEbus SYSFAIL* Always [Y/N] = N?

YNegate the VMEbus SYSFAIL∗ signal during board initialization.

NNegate the VMEbus SYSFAIL∗ signal after successful completion or entrance into the bug command monitor. (Default)

Local SCSI Bus Reset on Debugger Startup [Y/N] = N?

YLocal SCSI bus is reset on debugger setup.

NLocal SCSI bus is not reset on debugger setup. (Default)

Local SCSI Bus Negotiations Type [A/S/N] = A?

AAsynchronous SCSI bus negotiation. (Default)

SSynchronous SCSI bus negotiation.

NNone.

Local SCSI Data Bus Width [W/N] = N?

WWide SCSI (16-bit bus).

NNarrow SCSI (8-bit bus). (Default)

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http://www.motorola.com/computer/literature

6-5

Image 157

Motorola MVME2600 manual Wide Scsi 16-bit bus Narrow Scsi 8-bit bus. Default

Contents

Installation and Use Page Safety Summary Flammability CE Notice European Community Limited and Restricted Rights Legend Contents Chapter Connector Pin Assignments Appendix a Appendix D Related Documentation Page List of Figures Page List of Tables Xvi Model Number Description About This Manual Summary of Changes Overview of Contents Comments and Suggestions Bold Conventions Used in This Manual Introduction Hardware Preparation and Installation MVME2603/2604 Base Board Block Diagram Equipment Required Overview of Startup ProcedureStartup Overview What you need to do Refer to Connector Pin Assignments Unpacking Instructions Hardware Configuration MVME2603/2604 Base Board Preparation Flash Bank Selection J10 Cache Mode Control J3 Serial Port 4 Receive Clock Configuration J16 MVME2603/2604 Switches, Headers, Connectors, Fuses, LEDs Serial Port 4 Transmit Clock Configuration J17 Serial Port 4 Transmit Clock Receiver Buffer Control J20 Serial Port 3 Transmit Clock Configuration J18 System Controller Selection J22 Remote Status and Control MVME712M Transition Module Preparation MVME712M Transition Module Preparation Literature1-16Computer GroupCenter OnnectorCLocationsFigure 1-3. MVME712Mand Header Serial Port 4 Clock Configuration Serial Ports 1-4 DCE/DTE ConfigurationSerial Port Board Panel Connector Jumper Header MVME712M Port/Jumper Correspondence MVME712M Serial Port 1 DCE/DTE Configuration MVME712M Serial Port 2 DCE/DTE Configuration MVME712M Serial Port 3 DCE Configuration MVME712M Serial Port 3 DTE Configuration MVME712M Serial Port 4 DCE Configuration 10. MVME712M Serial Port 4 DTE Configuration P2 Adapter Preparation 11. MVME712M P2 Adapter Component Placement MVME761 Transition Module Preparation 12. MVME761 Connector and Header Locations Port Connector Header J12 Configuration of Serial Ports 3Serial Ports 1 Synchronous Board J2J2 13. MVME761 Serial Ports 1 and 2 DCE Only 14. MVME761 Serial Ports 3 and 4 DCE Configuration 15. MVME761 Serial Ports 3 and 4 DTE Configuration P2 Adapter Preparation Three-Row P2 Adapter Preparation Five-Row 16. MVME761 P2 Adapter Three-Row Component Placement 17. MVME761 P2 Adapter Five-Row Component Placement RAM200 Memory Mezzanine Installation Hardware Installation Hardware Preparation and Installation 18. RAM200 Placement on MVME2603/2604 PMC Module Installation Hardware Preparation and Installation 19. PMC Module Placement on MVME2603/2604 PMC Carrier Board Installation 20. PMC Carrier Board Placement on MVME2603/2604 MVME2603/2604 VME Module Installation Hardware Installation MVME712M Transition Module Installation Hardware Installation Hardware Preparation and Installation 21. MVME712M/MVME2603/2604 Cable Connections MVME761 Transition Module Installation 22. MVME761/MVME2603/2604 Cable Connections System Considerations MVME2603/2604 VME Module Hardware Preparation and Installation System Considerations Page Operating Instructions Applying Power PPCBug System Startup Reset Switch S2 Abort Switch S1Applying Power Front Panel Indicators DS1 DS6 Processor Memory Map Memory Maps Processor Default View of the Memory Map Default Processor Memory MapProcessor Address Size Definition Start End VMEbus Memory Map PCI Local Bus Memory Map Programming Considerations VMEbus Master Mapping PCI Arbitration Assignments PCI ArbitrationPCI Bus Request PCI Masters Programming Considerations Interrupt Handling MVME2603/MVME2604 Interrupt Architecture DMA Channels Sources of ResetIBC DMA Channel Assignments Controller DMA Assignment Priority Label Asic Classes of Reset and Effectiveness Processor/Memory Domain Endian IssuesPCI Domain VMEbus Domain PCI and Scsi MVME2603/2604 Features FeaturesFeature Description ECC Dram Scsi I/O VME I/O General Description MVME2603/2604 Block Diagram Block Diagram Scsi Termination Scsi Interface Ethernet Interface Signaling Voltage PMC ConnectorsPCI Mezzanine Interface Mezzanine Type ISA Super I/O Device Isasio VMEbus Interface Parallel Port Asynchronous Serial Ports Disk Drive Controller PCI-ISA Bridge PIB ControllerKeyboard and Mouse Interface Real-Time Clock/NVRAM/Timer Function Interval Timers Programmable Timers Serial Communications Interface Bit Timers Base Module Feature Register Offset $0802 Base Module Feature RegisterZ8536 CIO Device SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 P2 Multiplexing Sequence P2 Signal Multiplexing DSR1 RLB4 DCD4 Idreq ∗ TM4/MID2 DTR1 RI4 DTR2 RI1DCD1 RI2 Front Panel Indicators DS1 DS6 Power Polyswitches Resettable FusesFuse Assignments Fuse Voltage PM603/604 Processor Speaker Control Flash Memory RAM200 Memory Module MVME712M Transition Module Serial Interface Modules MVME761 Transition Module Model Module Number Type SIM Type IdentificationPage MVME2603/2604 Connectors Connector Pin Assignments Connector Pin Assignments LED Mezzanine Connector J1 Common ConnectorsLED Mezzanine Connector Debug Connector Debug Connector J2PA0 PA1 GND PDPAR2 PDPAR3 PDPAR0 PDPAR1PDPAR4 PDPAR5 PDPAR6 PDPAR7 TT1 TSIZ1 TT0 TSIZ0TT2 TSIZ2 TT3 TC0 Floppy/LED Connector Floppy/LED Connector J4 PCI Expansion Connector PCI Expansion Connector J5 Lock ∗ Sdone Devsel ∗ Trst ∗ PMC2P ∗ PMC2GNT ∗ PMC2REQ ∗GND Trdy ∗ Irdy ∗ PAR PAR64 Keyboard Connector Keyboard and Mouse Connectors J6, J8Mouse Connector Dram Mezzanine Connector Dram Mezzanine Connector J7Aras ∗ Acas ∗ RDL56 RDL57 RDL6 RDL7 RDL8 RDL9 RDL10 RDL11 RDL12RDL58 RDL59 RDL60 RDL61 CDL4 CDL5 CDL2 CDL3CDL6 CDL7 RDU0 RDU1 PCI Mezzanine Card Connector PCI Mezzanine Card ConnectorsJ11 J12 J13 J14 PMCIO14 PMCIO15 GND PMCIO12 PMCIO13PMCIO16 PMCIO17 GND PMCIO18 PMCIO19 VMEbus Connector P1 VMEbus Connector P1Row Z Row a Row B Row C Row D 10. VMEbus Connector P2 MVME712M I/O Mode VMEbus Connector P2MVME712M-Compatible Versions PMCIO6 GND PMCIO4 GNDSDBP0 PMCIO8 GND 11. Scsi Connector MVME712M Scsi ConnectorGND DBP ∗ Termpwr GND ATN ∗ BSY ∗ ACK ∗ RST ∗ MSG ∗ SEL ∗ REQ ∗ 12. Serial Connections-MVME712M Ports Serial Ports 13. Parallel I/O Connector MVME712M Parallel ConnectorPrstb ∗ GND PRD0 PRD1 PRD2 PRD3 PRD4 PRD5 PRD6 PRD7 GND Prbsy Prpe Prsel Inprime ∗ 14. Ethernet AUI Connector MVME712M Ethernet AUI Connector MVME761-Compatible Versions 15. VMEbus Connector P2 MVME761 I/O ModePMCIO16 16. Serial Connections-Ports 1 and 2 MVME761 17. Serial Connections-Ports 3 and 4 MVME761 Serial Ports 3 Prbsy GND Prsel 18. Parallel I/O Connector MVME761GND Prpe PRD0 PRD1 PRD2 PRD3 PRD4 PRD5 PRD6 PRD7 19. Ethernet 10BaseT/100BaseTX Connector MVME761 Ethernet 10BaseT/100BaseTX ConnectorPage Overview PPCBug PPCBug Implementation Memory Requirements Using the Debugger Debugger Commands Debugger CommandsCommand Description ENV GevbootFork Forkwr Reset PbootMAW MD, MDS SET RUNSrom SYM Diagnostic Test Groups Diagnostic TestsTest Set Description Applicability Cnfg and ENV Commands Cnfg Configure Board Information Block ENV Set Environment Configuring the PPCBug Parameters Remote Start Method Switch G/M/B/N = B? Wide Scsi 16-bit bus Narrow Scsi 8-bit bus. Default Nvram Bootlist GEV.fw-boot-path Boot Enable Y/N = N? Default = $00 Auto Boot Abort Delay = 7? ROM Boot Direct Ending Address = FFFFFFFC? Default Starting Address is $00000000 ROM Next Access Length 0 15 = 0? Configuring the VMEbus Interface PCI Slave Image 0 Bound Address Register = 00000000? PCI Slave Image 3 Control = C0400000? VMEbus Slave Image 1 Base Address Register = 00000000? VMEbus Slave Image 3 Translation Offset = 00000000? Table A-1. MVME2603/2604 Specifications SpecificationsCharacteristics Specifications Cooling Requirements FCC Compliance Page Synchronous Serial Ports Asynchronous Serial Ports EIA-232-D Connections Pin Signal Signal Name and Description Number Mnemonic Table B-1. EIA-232-D Interconnect Signals BSY Table B-2. EIA-232-D Interface Transmitter Characteristics Interface CharacteristicsTable B-3. EIA-232-D Interface Receiver Characteristics EIA-530 Connections Table B-4. MVME761 EIA-530 Interconnect Signals EIA-530 Connections Table B-5. EIA-530 Interface Transmitter Characteristics Proper Grounding Table B-6. EIA-530 Interface Receiver CharacteristicsPage Table C-1. Troubleshooting MVME2603/2604 Boards CTroubleshooting CPU Boards Solving Startup Problems Troubleshooting CPU Boards Solving Startup Problems Introduction Troubleshooting Procedure Complete Document Title Publication Number Motorola Computer Group Documents Document Title and Source Publication Number Manufacturers’ Documents MPC2604GA MPCFPE/AD CA91C042 ANSI/IEEE Related SpecificationsIEC 821 BUS Isbn MPR-PPC-RPU-02 TIA/EIA-232 Member countriesPage Index Dram Romnal Scsi PCI bus 2-4,2-7,3-3,3-7,3-11,3-17 10,2-14,2-16,3-8,3-17 uppercase