Texas Instruments TMS320C6712D Multichannel Buffered Serial Port 0 McBSP0, Reserved for Test

Models: TMS320C6712D

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SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Terminal Functions (Continued)

 

 

 

 

 

 

 

 

 

 

 

PIN

 

 

 

 

 

 

 

SIGNAL

NO.

TYPE

 

IPD/

 

 

DESCRIPTION

 

 

 

 

 

 

NAME

GDP/

 

IPU

 

 

 

 

 

 

 

 

 

 

ZDP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MULTICHANNEL BUFFERED SERIAL PORT 0 (McBSP0)

 

 

 

 

 

 

 

 

 

CLKS0

K3

I

 

IPD

 

External clock source (as opposed to internal)

 

 

 

 

 

 

 

 

 

CLKR0

H3

I/O/Z

 

IPD

 

Receive clock

 

 

 

 

 

 

 

 

 

CLKX0

G3

I/O/Z

 

IPD

 

Transmit clock

 

 

 

 

 

 

 

 

 

DR0

J1

I

 

IPU

 

Receive data

 

 

 

 

 

 

 

 

 

DX0

H2

O/Z

 

IPU

 

Transmit data

 

 

 

 

 

 

 

 

 

FSR0

J3

I/O/Z

 

IPD

 

Receive frame sync

 

 

 

 

 

 

 

 

 

FSX0

H1

I/O/Z

 

IPD

 

Transmit frame sync

 

 

 

 

 

 

 

 

 

 

 

GENERAL-PURPOSE INPUT/OUTPUT (GPIO) MODULE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clock output at half of device speed

 

CLKOUT2/GP[2]

Y12

I/O/Z

 

IPD

 

For this device, the CLKOUT2 pin is multiplexed with the GP[2] pin. Clock output at half of

 

 

 

 

 

 

 

device speed (O/Z) [default] (SYSCLK2 internal signal

 

 

 

 

 

 

 

from the clock generator) or this pin can be programmed as GP[2] (I/O/Z).

 

 

 

 

 

 

 

 

 

GP[7](EXT_INT7)

E3

 

 

 

 

External interrupts

 

 

 

 

 

Edge-driven

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Polarity independently selected via the External Interrupt Polarity Register

 

 

 

 

 

 

 

 

GP[6](EXT_INT6)

D2

 

 

 

 

 

bits (EXTPOL.[3:0])

 

 

 

I/O/Z

 

IPU

 

General-purpose input/output pins (I/O/Z) which also function as external

 

GP[5](EXT_INT5)

C1

 

 

 

 

 

 

 

 

 

 

 

 

interrupts

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Edge-driven

 

 

 

 

 

 

 

 

GP[4](EXT_INT4)

C2

 

 

 

 

Polarity independently selected via the External Interrupt Polarity Register

 

 

 

 

 

 

bits (EXTPOL.[3:0]), in addition to the GPIO registers.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RESERVED FOR TEST

 

 

 

 

 

 

 

 

 

RSV

C12

O

 

 

Reserved (leave unconnected, do not connect to power or ground)

 

 

 

 

 

 

 

 

 

RSV

D12

I

 

 

For proper device operation, the D12 pin must be externally pulled down with a 10-kre-

 

 

 

sistor.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (PLL Filter)

IPD = Internal pulldown, IPU = Internal pullup. [To oppose the supply rail on these IPD/IPU signal pins, use external pullup or pulldown resistors no greater than 4.4 kand 2.0 k, respectively.]

POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443

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Texas Instruments TMS320C6712D Multichannel Buffered Serial Port 0 McBSP0, GENERAL-PURPOSE INPUT/OUTPUT Gpio Module

TMS320C6712D specifications

The Texas Instruments TMS320C6712D is a high-performance, fixed-point digital signal processor (DSP) that belongs to the TMS320C6000 family, well known for its advanced processing capabilities tailored for demanding signal processing applications. Launched in the early 2000s, the C6712D combines high computational power with a rich set of features, making it suitable for a variety of applications such as telecommunications, audio processing, and industrial control systems.

One of the standout characteristics of the TMS320C6712D is its architecture, which is based on a highly efficient VLIW (Very Long Instruction Word) design. This architecture allows the processor to execute multiple instructions in a single clock cycle, significantly increasing performance. The device operates at clock speeds of up to 150 MHz, providing substantial computational throughput that can handle complex algorithms and real-time processing tasks.

Another key feature of the TMS320C6712D is its 32-bit fixed-point processing capabilities, which allows it to perform difficult mathematical computations efficiently. With an instruction set optimized for DSP applications, the processor includes specialized instructions for multiplying and accumulating operations, as well as support for advanced filtering and generation of audio signals.

The C6712D offers an extensive memory architecture, supporting up to 128 MB of external memory via a 32-bit data bus. It features on-chip SRAM, which provides fast access to data and program storage, enhancing the system's overall performance. Additionally, the device includes a powerful set of peripherals, such as dual asynchronous serial ports (UART), I2C interfaces, and DSP-specific interfaces that facilitate connectivity with other components and systems.

Power consumption is another vital aspect of the TMS320C6712D. It incorporates technologies allowing for low-power operation, which is essential for portable and battery-operated devices. The capability to operate in various power modes helps optimize performance while minimizing energy usage.

In conclusion, the Texas Instruments TMS320C6712D is a versatile and powerful DSP that excels in high-performance applications. Its VLIW architecture, fixed-point processing capabilities, extensive memory options, and low power consumption make it an ideal choice for engineers looking to implement complex signal processing tasks efficiently. Whether used in telecommunications, audio processing, or industrial applications, the C6712D remains a reliable and capable solution in the digital signal processing landscape.