Texas Instruments TSB12LV26 manual Header Type and Bist Register, Ohci Base Address Register

3.8 Header Type and BIST Register

The header type and BIST register indicates the TSB12LV26 PCI header type, and indicates no built-in self test. See Table 3±7 for a complete description of the register contents.

Bit	15	14	13	12	11	10	9		8	7	6	5	4	3	2	1	0
Name								Header type and BIST
Type	R	R	R	R	R	R	R		R	R	R	R	R	R	R	R	R
Default	0	0	0	0	0	0	0		0	0	0	0	0	0	0	0	0

Register: Header type and BIST

Type: Read-only

Offset: 0Eh

Default: 0000h

Table 3±7. Header Type and BIST Register Description

BIT	FIELD NAME	TYPE	DESCRIPTION
15±8	BIST	R	Built-in self test. The TSB12LV26 does not include a built-in self test; thus, this field returns 00h when
			read.
7±0	HEADER_TYPE	R	PCI header type. The TSB12LV26 includes the standard PCI header, and this is communicated by
			returning 00h when this field is read.

3.9 OHCI Base Address Register

The OHCI base address register is programmed with a base address referencing the memory-mapped OHCI control. When BIOS writes all 1s to this register, the value read back is FFFF F800h, indicating that at least 2K bytes of memory address space are required for the OHCI registers. See Table 3±8 for a complete description of the register contents.

Bit	31	30	29		28		27	26	25		24	23	22	21	20	19	18	17	16
Name										OHCI base address
Type	R/W	R/W	R/W		R/W		R/W	R/W	R/W		R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Default	0	0	0		0		0	0	0		0	0	0	0	0	0	0	0	0
Bit	15	14	13		12		11	10	9		8	7	6	5	4	3	2	1	0
Name											OHCI address
Type	R/W	R/W	R/W		R/W		R/W	R	R		R	R	R	R	R	R	R	R	R
Default	0	0	0		0		0	0	0		0	0	0	0	0	0	0	0	0
	Register:		OHCI base address
	Type:		Read/Write, Read-only
	Offset:		10h
	Default:		0000 0000h
					Table 3±8. OHCI Base Address Register Description
BIT	FIELD NAME			TYPE									DESCRIPTION
31±11	OHCIREG_PTR			R/W		OHCI register pointer. Specifies the upper 21 bits of the 32-bit OHCI base address register.
10±4	OHCI_SZ				R	OHCI register size. This field returns 0s when read, indicating that the OHCI registers require a
						2-Kbyte region of memory.
3	OHCI_PF				R	OHCI register prefetch. This bit returns 0 when read, indicating that the OHCI registers are
						nonprefetchable.
2±1	OHCI_MEMTYPE				R	OHCI memory type. This field returns 0s when read, indicating that the OHCI base address register is
						32 bits wide and mapping can be done anywhere in the 32-bit memory space.
0	OHCI_MEM				R	OHCI memory indicator. This bit returns 0 when read, indicating that the OHCI registers are mapped
						into system memory space.

3±7