3.10 TI Extension Base Address Register

The TI extension base address register is programmed with a base address referencing the memory-mapped TI extension registers. See the OHCI Base Address Register, Section 3.9, for bit field details.

Bit

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Name

 

 

 

 

 

 

TI extension base address

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Type

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Default

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Bit

15

 

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Name

 

 

 

 

 

 

 

TI extension base address

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Type

R/W

 

R/W

R/W

R/W

R/W

R

R

R

R

R

R

R

R

R

R

R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Default

0

 

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Register:

TI extension base address

 

 

 

 

 

 

 

 

 

 

Type:

 

Read/Write, Read-only

 

 

 

 

 

 

 

 

 

 

 

Offset:

 

14h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Default:

0000 0000h

 

 

 

 

 

 

 

 

 

 

 

 

3.11 Subsystem Identification Register

The subsystem identification register is used for system and option card identification purposes. This register can be initialized from the serial ROM or programmed via the subsystem ID and subsystem vendor ID alias registers at offset F8h. See Table 3±9 for a complete description of the register contents.

Bit

31

 

30

29

28

 

27

26

 

25

24

23

22

21

20

19

18

17

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Name

 

 

 

 

 

 

 

 

 

Subsystem identification

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Type

RU

 

RU

RU

RU

 

RU

RU

 

RU

RU

RU

RU

RU

RU

RU

RU

RU

RU

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Default

0

 

0

0

0

 

0

0

 

0

0

0

0

0

0

0

0

0

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

15

 

14

13

12

 

11

10

 

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Name

 

 

 

 

 

 

 

 

 

Subsystem identification

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Type

RU

 

RU

RU

RU

 

RU

RU

 

RU

RU

RU

RU

RU

RU

RU

RU

RU

RU

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Default

0

 

0

0

0

 

0

0

 

0

0

0

0

0

0

0

0

0

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Register:

Subsystem identification

 

 

 

 

 

 

 

 

 

 

 

Type:

 

Read/Update

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Offset:

 

2Ch

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Default:

0000 0000h

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 3±9. Subsystem Identification Register Description

BIT

FIELD NAME

TYPE

DESCRIPTION

 

 

 

 

31±16

OHCI_SSID

RU

Subsystem device ID. This field indicates the subsystem device ID.

 

 

 

 

15±0

OHCI_SSVID

RU

Subsystem vendor ID. This field indicates the subsystem vendor ID.

3±8

Page 28
Image 28
Texas Instruments TSB12LV26 manual TI Extension Base Address Register, Subsystem Identification Register

TSB12LV26 specifications

The Texas Instruments TSB12LV26 is a high-performance, low-voltage transceiver designed for Serial Bus applications. It is widely recognized for its robust features and versatility, making it a popular choice among engineers and designers in various industries. One of the primary features of the TSB12LV26 is its support for high-speed data transmission, enabling it to operate at speeds up to 400 Mbps. This capability is essential for applications that demand rapid data transfer, such as in multimedia and communication systems.

The TSB12LV26 is part of the IEEE 1394 standard, also known as FireWire, which is widely used for connecting devices like digital cameras, external hard drives, and printers. The chip operates within a voltage range of 2.7V to 3.6V, making it suitable for low-power applications where energy efficiency is critical. The integration of advanced Low-Voltage Differential Signaling (LVDS) technology within the TSB12LV26 enhances signal integrity and reduces electromagnetic interference, resulting in more reliable performance over longer distances.

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Another significant advantage of the TSB12LV26 is its capability for peer-to-peer communication, enabling devices to connect and communicate directly without the need for a central controller. This functionality supports a wide range of device configurations and simplifies system architecture. Furthermore, the transceiver offers built-in support for asynchronous and isochronous data transfer, making it adaptable for various application requirements.

The TSB12LV26 also adheres to stringent EMI and ESD protection standards, ensuring reliable operation in challenging environments. With a rich feature set, excellent performance characteristics, and compliance with industry standards, the Texas Instruments TSB12LV26 remains an ideal choice for engineers looking to implement high-speed and reliable communication in their designs. Overall, it represents a significant advancement in the field of data transmission technology, making it a preferred component for numerous electronic applications.