Table 4±1. OHCI Register Map (Continued)

DMA CONTEXT

REGISTER NAME

ABBREVIATION

OFFSET

 

 

 

 

Self ID

Reserved

Ð

60h

 

 

 

 

 

Self ID buffer

SelfIDBuffer

64h

 

 

 

 

 

Self ID count

SelfIDCount

68h

 

 

 

 

 

Reserved

Ð

6Ch

 

 

 

 

Ð

Isochronous receive channel mask high

IRChannelMaskHiSet

70h

 

 

 

 

IRChannelMaskHiClear

74h

 

 

 

 

 

 

 

Isochronous receive channel mask low

IRChannelMaskLoSet

78h

 

 

 

 

IRChannelMaskLoClear

7Ch

 

 

 

 

 

 

 

Interrupt event

IntEventSet

80h

 

 

 

 

IntEventClear

84h

 

 

 

 

 

 

 

Interrupt mask

IntMaskSet

88h

 

 

 

 

IntMaskClear

8Ch

 

 

 

 

 

 

 

Isochronous transmit interrupt event

IsoXmitIntEventSet

90h

 

 

 

 

IsoXmitIntEventClear

94h

 

 

 

 

 

 

 

Isochronous transmit interrupt mask

IsoXmitIntMaskSet

98h

 

 

 

 

IsoXmitIntMaskClear

9Ch

 

 

 

 

 

 

Ð

Isochronous receive interrupt event

IsoRecvIntEventSet

A0h

 

 

 

 

IsoRecvIntEventClear

A4h

 

 

 

 

 

 

 

Isochronous receive interrupt mask

IsoRecvIntMaskSet

A8h

 

 

 

 

IsoRecvIntMaskClear

ACh

 

 

 

 

 

 

 

Reserved

 

B0±D8h

 

 

 

 

 

Fairness control

FairnessControl

DCh

 

 

 

 

 

Link control

LinkControlSet

E0h

 

 

 

 

LinkControlClear

E4h

 

 

 

 

 

 

 

Node identification

NodeID

E8h

 

 

 

 

 

PHY layer control

PhyControl

ECh

 

 

 

 

 

Isochronous cycle timer

Isocyctimer

F0h

 

 

 

 

 

Reserved

 

F4h±FCh

 

 

 

 

 

Asynchronous request filter high

AsyncRequestFilterHiSet

100h

 

 

 

 

AsyncRequestFilterHiClear

104h

 

 

 

 

 

 

 

Asynchronous request filter low

AsyncRequestFilterLoSet

108h

 

 

 

 

AsyncRequestFilterloClear

10Ch

 

 

 

 

 

 

 

Physical request filter high

PhysicalRequestFilterHiSet

110h

 

 

 

 

PhysicalRequestFilterHiClear

114h

 

 

 

 

 

 

 

Physical request filter low

PhysicalRequestFilterLoSet

118h

 

 

 

 

PhysicalRequestFilterloClear

11Ch

 

 

 

 

 

 

 

Physical upper bound

PhysicalUpperBound

120h

 

 

 

 

 

Reserved

Ð

124h±17Ch

4±2

Page 40
Image 40
Texas Instruments TSB12LV26 manual IsoRecvIntEventClear, Isochronous receive interrupt mask IsoRecvIntMaskSet

TSB12LV26 specifications

The Texas Instruments TSB12LV26 is a high-performance, low-voltage transceiver designed for Serial Bus applications. It is widely recognized for its robust features and versatility, making it a popular choice among engineers and designers in various industries. One of the primary features of the TSB12LV26 is its support for high-speed data transmission, enabling it to operate at speeds up to 400 Mbps. This capability is essential for applications that demand rapid data transfer, such as in multimedia and communication systems.

The TSB12LV26 is part of the IEEE 1394 standard, also known as FireWire, which is widely used for connecting devices like digital cameras, external hard drives, and printers. The chip operates within a voltage range of 2.7V to 3.6V, making it suitable for low-power applications where energy efficiency is critical. The integration of advanced Low-Voltage Differential Signaling (LVDS) technology within the TSB12LV26 enhances signal integrity and reduces electromagnetic interference, resulting in more reliable performance over longer distances.

In terms of its physical characteristics, the TSB12LV26 is available in a compact 48-pin HTQFP package, which is beneficial for space-constrained designs. The device features a comprehensive set of input and output pins, allowing for flexible connectivity options. Additionally, the TSB12LV26 includes advanced power management features, including low-power modes that help extend battery life in portable devices.

Another significant advantage of the TSB12LV26 is its capability for peer-to-peer communication, enabling devices to connect and communicate directly without the need for a central controller. This functionality supports a wide range of device configurations and simplifies system architecture. Furthermore, the transceiver offers built-in support for asynchronous and isochronous data transfer, making it adaptable for various application requirements.

The TSB12LV26 also adheres to stringent EMI and ESD protection standards, ensuring reliable operation in challenging environments. With a rich feature set, excellent performance characteristics, and compliance with industry standards, the Texas Instruments TSB12LV26 remains an ideal choice for engineers looking to implement high-speed and reliable communication in their designs. Overall, it represents a significant advancement in the field of data transmission technology, making it a preferred component for numerous electronic applications.