4.19 Isochronous Receive Channel Mask High Register
The isochronous receive channel mask high set/clear register is used to enable packet receives from the upper 32 isochronous data channels. A read from either the set register or clear register returns the content of the isochronous receive channel mask high register. See Table 4±12 for a complete description of the register contents.
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
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| Isochronous receive channel mask high |
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Type | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC |
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Default | X | X | X | X | X | X | X | X | X | X | X | X | X | X | X | X |
Bit | 15 |
| 14 | 13 | 12 | 11 |
| 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Name |
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| Isochronous receive channel mask high |
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Type | RSC |
| RSC | RSC | RSC | RSC |
| RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC | RSC |
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Default | X |
| X | X | X | X |
| X | X | X | X | X | X | X | X | X | X | X |
| Register: | Isochronous receive channel mask high |
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| Type: |
| Read/Set/Clear |
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| Offset: |
| 70h | set register |
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| 74h | clear register |
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| Default: | XXXX XXXXh | ||
| Table 4±12. Isochronous Receive Channel Mask High Register Description | |||
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BIT | FIELD NAME |
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31 | isoChannel63 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 63. |
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30 | isoChannel62 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 62. |
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29 | isoChannel61 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 61. |
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28 | isoChannel60 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 60. |
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27 | isoChannel59 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 59. |
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26 | isoChannel58 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 58. |
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25 | isoChannel57 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 57. |
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24 | isoChannel56 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 56. |
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23 | isoChannel55 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 55. |
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22 | isoChannel54 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 54. |
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21 | isoChannel53 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 53. |
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20 | isoChannel52 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 52. |
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19 | isoChannel51 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 51. |
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18 | isoChannel50 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 50. |
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17 | isoChannel49 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 49. |
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16 | isoChannel48 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 48. |
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15 | isoChannel47 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 47. |
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14 | isoChannel46 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 46. |
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13 | isoChannel45 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 45. |
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12 | isoChannel44 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 44. |
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11 | isoChannel43 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 43. |
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10 | isoChannel42 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 42. |
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9 | isoChannel41 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 41. |
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8 | isoChannel40 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 40. |
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7 | isoChannel39 |
| RSC | When this bit is set, the TSB12LV26 is enabled to receive from iso channel number 39. |
4±15